Sun Microsystems UltraSPARC-I User Manual page 214

floating-point/graphics code only). Pixel values are stored in single-precision
floating point registers and fixed values are stored in double-precision floating-
point registers, unless otherwise specified.
13.5.1 Opcode Format
The graphics instruction set maps to the opcode space reserved for the Imple-
mentation-Dependent Instruction 1 (IMPDEP1) instructions.
Format (3):
10 rd
31 30 29 25
13.5.2 Partitioned Add/Subtract Instructions
opcode
FPADD16
FPADD16 S
FPADD32
FPADD32S
FPSUB16
FPSUB16S
FPSUB32
FPSUB32S
Format (3):
10 rd
31 30 29 25
Suggested Assembly Language Syntax
fpadd16
fpadd16s
fpadd32
fpadd32s
fpsub16
fpsub16s
fpsub32
fpsub32s
Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com
110110 rs1
24 19 18
opf operation
0 0101 0000
Four 16-bit add
0 0101 0001
Two 16-bit add
0 0101 0010
Two 32-bit add
0 0101 0011
One 32-bit add
0 0101 0100
Four 16-bit subtract
0 0101 0101
Two 16-bit subtract
0 0101 0110
Two 32-bit subtract
0 0101 0111
One 32-bit subtract
110110 rs1
24 19 18
freg , freg , freg
rs1 rs2 rd
freg , freg , freg
rs1 rs2 rd
freg , freg , freg
rs1 rs2 rd
freg , freg , freg
rs1 rs2 rd
freg , freg , freg
rs1 rs2 rd
freg , freg , freg
rs1 rs2 rd
freg , freg , freg
rs1 rs2 rd
freg , freg , freg
rs1 rs2 rd
13. UltraSPARC Extended Instructions
opf
14 13 5
opf
14 13 5
Sun Microelectronics
rs2
4 0
rs2
4 0
199