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raSPARC User's Manual
3 Alternate Address Spaces
The SPARC-V9 Address Space Identifier (ASI) is evenly divided into restricted
and nonrestricted halves. ASIs in the range 00
range 80
.. FF
16
cess a restricted ASI causes a
ASIs in the ranges 04
80
.. FF
are called "normal" or "translating" ASIs. These ASIs are translated by
16
16
the MMU.
Bypass ASIs are in the range 14
lated by the MMU; instead, they pass through their virtual addresses as physical
addresses.
UltraSPARC Internal ASIs (also called "nontranslating ASIs") are in the ranges
45
.. 6F
, 76
16
16
16
instead, they pass through their virtual addresses as physical addresses. Accesses
made using these ASIs are always made in "big-endian" mode, regardless of the
setting of the D-MMU's IE bit. Accesses to Internal ASIs with invalid virtual ad-
dress have undefined behavior; they may or may not cause a
data_access_exception
dress. Software should not rely on any specific behavior.
Note: MEMBAR #Sync is generally needed after stores to internal ASIs. A
FLUSH, DONE, or RETRY is needed after stores to internal ASIs that affect
instruction accesses. See Section 5.3.8, "Instruction Prefetch to Side-Effect
Locations," on page 38.
3.1 Supported SPARC-V9 ASIs
The SPARC-V9 architecture defines several address spaces that must be support-
ed by a conforming processor. They are listed in Table 8-1. All operand sizes are
supported in these accesses. See Appendix F, "ASI Names," for an alphabetical
listing of ASI names and macro syntax.
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are non-restricted. An attempt by non-privileged software to ac-
16
data_access_exception
.. 11
, 18
..19
16
16
16
..15
16
.. 77
and 7E
..7F
. These ASIs are not translated by the MMU;
16
16
16
trap. They may or may not alias onto a valid virtual ad-
..7F
are restricted; ASIs in the
16
16
trap.
, 24
..2C
, 70
.. 73
16
16
16
16
and 1C
.. 1D
. These ASIs are not trans-
16
16
16
, 78
..79
and
16
16
16
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