Supported Memory Models - Sun Microsystems UltraSPARC-I User Manual

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raSPARC User's Manual
data registers, and for access protection. Attempts by non-privileged software
(PSTATE.PRIV=0) to access restricted ASIs (ASI<7>=0) cause a
trap.
Memory is logically divided into real memory (cached) and I/O memory (non-
cached with and without side-effects) spaces. Real memory spaces can be access-
ed without side-effects. For example, a read from real memory space returns the
information most recently written. In addition, an access to real memory space
does not result in program-visible side-effects. In contrast, a read from I/O space
may not return the most recently written information and may result in program-
visible side-effects.

.2 Supported Memory Models

The following sections contain brief descriptions of the three memory models
supported by UltraSPARC. These definitions are for general illustration. Detailed
definitions of these models can be found in The SPARC Architecture Manual, Ver-
sion 9. The definitions in the following sections apply to system behavior as seen
by the programmer. A description of MEMBAR can be found in Section 5.3.2,
"Memory Synchronization: MEMBAR and FLUSH," on page 32
Note: Stores to UltraSPARC Internal ASIs, block loads, and block stores are
outside of the memory model; that is, they need MEMBARs to control ordering.
See Section 5.3.8, "Instruction Prefetch to Side-Effect Locations," on page 38 and
Section 13.6.4, "Block Load and Store Instructions," on page 230.
Note: Atomic load-stores are treated as both a load and a store and can only be
applied to cacheable address spaces.
.2.1 TSO
UltraSPARC implements the following programmer-visible properties in Total
Store Order (TSO) mode:
Loads are processed in program order; that is, there is an implicit MEMBAR
#LoadLoad between them.
Loads may bypass earlier stores. Any such load that bypasses such earlier
stores must check (snoop) the store buffer for the most recent store to that
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address. A MEMBAR #Lookaside is not needed between a store and a
privileged_action

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