Lsu_Control_Register - Sun Microsystems UltraSPARC-I User Manual

raSPARC User's Manual
DB_VA: The 64-bit virtual data watchpoint address.
Note: UltraSPARC-I and UltraSPARC-II support a 44-bit virtual address space.
Software is responsible to write a sign-extended 64-bit address into the VA
watchpoint register. The watchpoint address is sign-extended to 64 bits from bit
43 when read.
5.4 Physical Address Data Watchpoint Register
63
Figure A-3 PA Data Watchpoint Register Format (ASI 58
DB_PA: The 41-bit physical data watchpoint address.
Note: UltraSPARC-I and UltraSPARC-II support a 41-bit physical address space.
Software is responsible to write a zero-extended 64-bit address into the watch
point register.

6 LSU_Control_Register

ASI 45 , VA=00
16
Name: ASI_LSU_CONTROL_REGISTER
•
The LSU_Control_Register contains fields that control several memory-related
hardware functions in UltraSPARC. These include I- and D-Caches and
MMUs, bad parity generation, and watchpoint setting. See also Table 10-1,
"Machine State After Reset and in RED_state," on page 172 for the state of this
register after reset or RED_state trap.
—
—
63 44 43
Figure A-4 LSU_Control_Register Access Data Format (ASI 45
6.1 Cache Control
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IC: LSU.I-Cache_enable. If cleared, misses are forced on I-Cache accesses
41 40
16
—
— PM VM
42 41 40 33 32 25 24
DB_PA
, VA=40
16
PR PW VR VW
—
23 22 21 20 19
16
—
3 2 0
)
16
FM DM IM DC IC
4 3 2 1 0
)