13.6.3 Atomic Quad Load
Opcode
ASI_NUCLEUS_QUAD_LDD
LDDA
ASI_NUCLEUS_QUAD_LDD_L
LDDA
Format (3) LDDA:
11
rd
11
rd
31
30 29
Suggested Assembly Language Syntax
ldda
ldda
Description:
These ASIs are used with the LDDA instruction to atomically read a 128-bit data
item. They are intended to be used by the TLB miss handler to access TSB entries
without requiring locks. The data is placed in an even/odd pair of 64-bit integer
registers. The lowest address 64-bits is placed in the even register; the highest ad-
dress 64-bits is placed in the odd register. The reference will be made from the
nucleus context. In addition to the usual traps for LDDA using a privileged ASI,
a
data_access_exception
any instruction other than LDDA. A
the access is not aligned on a 128-bit boundary.
Traps:
fp_disabled
PA_watchpoint
VA_watchpoint
mem_address_not_aligned
opcode is not LDFA or STDFA)
data_access_exception
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imm_asi
01 0011
rs1
01 0011
rs1
25
24
19
18
[ reg_addr ] imm_asi , reg
rd
[ reg_plus_imm ] %asi, reg
rd
trap will be taken for a noncacheable access, or use with
mem_address_not_aligned
(Checked for opcode implied alignment if the
13. UltraSPARC Extended Instructions
ASI Value
Operation
24
128-bit atomic load
16
2C
128-bit atomic load, little
16
endian
imm_asi
i=0
simm_13
i=1
5
14
13
12
trap will be taken if
Sun Microelectronics
rs2
4
0
229
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