Sun Microsystems UltraSPARC-I User Manual page 150

The following transaction sequence is the same as for Section 7.16.1, "Read-
ToShare Block," except that the miss generates a dirty victim block. UltraSPARC
always issues the read request before the Writeback request, but the requests can
be completed in any order. In this example, the read completes first. The follow-
ing section shows the sequence when the Writeback completes first.
Table 7-32
Processor 1
Initial victim state:
Etag1{M},
Initial missed state:
Etag2{I}
P1 copies the victim block into
the Writeback buffer
P_RDS_REQ to System
(DVP bit set)
P1 updates Etag2{I
P_WRB_REQ to System
P1 clears Writeback buffer tag
7.16.9 Victim Writeback Serviced Before Read
Condition: Load/store miss on dirty victim block. SC services Writeback before
read.
Table 7-33
Processor 1
Initial victim state:
Etag1{M}
Initial missed state:
Etag2{I}
P1 copies the victim block
into the writeback buffer
P_RDS_REQ to System
(DVP bit set)
P_WRB_REQ to System
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Victim Writeback, Read Miss Serviced Before Writeback
System
S_RBU reply to P1
E}
S_WAB reply to P1
Victim Writeback: Writeback Serviced Before Read Miss
System
S_WAB reply to P1
Start write to memory
7. UltraSPARC External Interfaces
Processor 2
Initial state: Initial state:
Etag2{I} Etag2{I}
Final state: No change Final state: No change
Processor 2
Initial state: Initial state:
Etag2{I} Etag2{I}
Processor 3
Processor 3