Sun Microsystems UltraSPARC-I User Manual page 163

raSPARC User's Manual
Table 8-2 UltraSPARC Extended (non-SPARC-V9) ASIs
SI
ASI Name (Suggested Macro Syntax)
lue
ASI_PHYS_USE_EC
16
(ASI_PHYS_USE_EC)
ASI_PHYS_BYPASS_EC_WITH_EBIT
16
(ASI_PHYS_BYPASS_EC_WITH_EBIT)
C ASI_PHYS_USE_EC_LITTLE
16
(ASI_PHYS_USE_EC_L)
D ASI_PHYS_BYPASS_EC_WITH_EBIT_LI
16
TTLE
(ASI_PHYS_BYPASS_EC_WITH_EBIT_L)
ASI_NUCLEUS_QUAD_LDD
16
(ASI_NUCLEUS_QUAD_LDD)
C ASI_NUCLEUS_QUAD_LDD_LITTLE
16
(ASI_NUCLEUS_QUAD_LDD_L)
ASI_LSU_CONTROL_REG
16
(ASI_LSU_CONTROL_REG)
ASI_DCACHE_DATA
16
(ASI_DCACHE_DATA)
ASI_DCACHE_TAG
16
(ASI_DCACHE_TAG)
ASI_INTR_DISPATCH_STATUS
16
(ASI_INTR_DISPATCH_STATUS)
ASI_INTR_RECEIVE
16
(ASI_INTR_RECEIVE)
A ASI_UPA_CONFIG_REG
16
(ASI_UPA_CONFIG_REG)
ASI_ESTATE_ERROR_EN_REG
16
(ASI_ESTATE_ERROR_EN_REG)
C ASI_AFSR (ASI_AFSR)
16
D ASI_AFAR (ASI_AFAR)
16
ASI_ECACHE_TAG_DATA
16
(ASI_EC_TAG_DATA)
ASI_IMMU (ASI_IMMU)
16
ASI_IMMU (ASI_IMMU)
16
ASI_IMMU (ASI_IMMU)
16
ASI_IMMU (ASI_IMMU)
16
ASI_IMMU_TSB_8KB_PTR_REG
16
(ASI_IMMU_TSB_8KB_PTR_REG)
ASI_IMMU_TSB_64KB_PTR_REG
16
(ASI_IMMU_TSB_64KB_PTR_REG)
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ASI_ITLB_DATA_IN_REG
16
VA Access
2,5
— RW Physical address, external cache-
able only
2
— RW Physical address, non-cacheable,
with side-effect
2,5
— RW Physical address, external cache-
able only, little endian
2
— RW Physical address, non-cacheable,
with side-effect, little endian
1,3
— R Cacheable, 128-bit atomic LDDA
1,3
— R Cacheable, 128-bit atomic LDDA,
little endian
0 RW Load/store unit control register
16
— RW D-Cache data RAM diagnostics
access
— RW D-Cache tag/valid RAM diag-
nostics access
1
0 R Interrupt vector dispatch status
16
0 RW Interrupt vector receive status
16
0 RW UPA configuration register
16
0 RW E-Cache error enable register
16
0 RW Asynchronous fault status regis-
16
ter
0 RW Asynchronous fault address reg-
16
ister
0 RW E-Cache tag/valid RAM data
16
diagnostic access
1
0 R I-MMU Tag Target Register
16
18 RW I-MMU Synchronous Fault Status
16
Register
28 RW I-MMU TSB Register
16
30 RW I-MMU TLB Tag Access Register
16
1
0 R I-MMU TSB 8KB Pointer Register
16
1
0 R I-MMU TSB 64KB Pointer Regis-
16
ter
1
0 W I-MMU TLB Data In Register
16
Description Section
6.10
6.10
6.10
6.10
13.6.3
13.6.3
A.6
A.8.1
A.8.2
9.3.3
9.3.5
8.3.3.2
11.3.1
11.3.3
11.3.2
A.9.2
6.9.2
6.9.4
6.9.5.1
6.9.7
6.9.8
6.9.8
6.9.9