Omron SYSMAC CS Series Operation Manual page 506

Index Registers
Forcing Bit Status
Direct Addressing
Precautions
468
power was interrupted will be held. For example, in a program with three
tasks, tasks 0, 1, and 2, if power is interrupted in the nth cycle during execu-
tion of task 1, then the execution result for the nth cycle of task 0 and the exe-
cution results for the (n−1)th cycle of tasks 1 and 2 will be held.
If the IOM Hold Bit (A50012) is ON, the PLC Setup's "IOM Hold Bit Status at
Startup" setting is set to protect the IOM Hold Bit, and the Index Registers are
set to be shared between tasks, Index Registers will not be held when the
PLC's power supply is reset (ON →OFF →ON). The Index Registers may take
undefined values. Be sure to set the values before continuing.
Bits in Index Registers cannot be force-set and force-reset.
When an Index Register is used as an operand without a "," prefix, the instruc-
tion will operate on the contents of the Index Register itself (a two-word or
"double" value). Index Registers can be directly addressed only in the instruc-
tions shown in the following table. Use these instructions to operate on the
Index Registers as pointers.
The Index Registers cannot be directly addressed in any other instructions,
although they can usually be used for indirect addressing.
Instruction group
Data Movement MOVE TO REGISTER
Instructions
MOVE TIMER/COUNTER PV TO REGISTER
DOUBLE MOVE
DOUBLE DATA EXCHANGE
Table Data Pro- SET RECORD LOCATION
cessing Instruc-
GET RECORD NUMBER
tions
Increment/Decre- DOUBLE INCREMENT BINARY
ment Instructions
DOUBLE DECREMENT BINARY
Comparison DOUBLE EQUAL
Instructions
DOUBLE NOT EQUAL
DOUBLE LESS THAN
DOUBLE LESS THAN OR EQUAL
DOUBLE GREATER THAN
DOUBLE GREATER THAN OR EQUAL
DOUBLE COMPARE
Symbol Math DOUBLE SIGNED BINARY ADD WITHOUT
Instructions CARRY
DOUBLE SIGNED BINARY SUBTRACT
WITHOUT CARRY
The SRCH(181), MAX(182), and MIN(183) instructions can output the PLC
memory address of the word with the desired value (search value, maximum,
or minimum) to IR0. In this case, IR0 can be used in later instructions to
access the contents of that word.
Do not use Index Registers until a PLC memory address has been set in the
register. The pointer operation will be unreliable if the registers are used with-
out setting their values.
The values in Index Registers are unpredictable at the start of an interrupt
task. When an Index Register will be used in an interrupt task, always set a
PLC memory address in the Index Register with MOVR(560) or MOVRW(561)
before using the register in that task.
Instruction name
Section 9-22
Mnemonic
MOVR(560)
MOVRW(561)
MOVL(498)
XCGL(562)
SETR(635)
GETR(636)
++L(591)
– –L(593)
=L(301)
< >L(306)
< L(311)
< =L(316)
> L(321)
> =L(326)
CMPL(060)
+L(401)
–L(411)