Cs1-H Cpu Unit Features; High-Speed Performance - Omron SYSMAC CS Series Operation Manual

CS1-H CPU Unit Features

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CS1-H CPU Unit Features

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High-speed Performance

Ultra High-speed Cycle
Time
1,2,3...
Faster Execution of
Common Instructions
Transfer Speed between
CPU Unit and CPU Bus
Units Doubled
Parallel Processing of
Instructions and
Peripheral Servicing
The CS1-H CPU Units provide a cycle time that is three to four times faster
than that of the CS1 CPU Units.
For example, a program consisting of 38 Ksteps of only basic instructions with
128 inputs and 128 outputs executes in 1 ms (4.2 ms for the CS1 CPU Units);
a program consisting of 20 Ksteps of basic and special instructions in a 1:1
ratio with 128 inputs and 128 outputs executes in 1 ms (2.0 ms for the CS1
CPU Units); and a program consisting of 8 Ksteps of basic and special
instructions in a 1:2 ratio with 64 inputs and 64 outputs executes in 0.5 ms
(1.0 ms for the CS1 CPU Units).
The following factors give the CS1-H CPU Units their high speed.
1. Instruction execution times: Only about 1/2 the time required for basic in-
structions, and only about 1/3 the time required for special instructions.
2. Better bus performance: Data transfers between the CPU Unit and Special
I/O or Communications Units is about twice as fast, providing greater over-
all system performance.
3. Instruction execution is performed in parallel with peripheral servicing.
4. Other factors, including background execution of text string processing and
table data processing instructions.
Extensive research on applications of CS1 CPU Units was used to identify the
20 most commonly used instructions of the more than 400 supported instruc-
tions (see below), and execution speed for these instructions was increased
by 10 to 20 times previous performance.
CPS (SIGNED BINARY COMPARE)
JMP (JUMP)
CPSL (DOUBLE SIGNED BINARY COMPARE)
CJP (CONDITIONAL JUMP)
XFER (BLOCK TRANSFER)
BCNT (BIT COUNTER)
MOVB (MOVE BIT)
MLPX (DATA DECODER)
MOVD (MOVE DIGITS)
BCD (BINARY-TO-BCD)
BSET (BLOCK SET)
SBS/RET (SUBROUTINE CALL/RETURN)
The speed of transferring data between the CPU Unit and CPU Bus Units has
been doubled to increase overall system performance.
A special mode is supported that enables parallel processing of instruction
execution and peripheral device servicing to support the following types of
application.
• Extensive data exchange with a host not restricted by the program capac-
ity in the CS1-H CPU Unit
• Consistently timed data exchange with SCADA software
• Eliminating the effects on cycle time of future system expansion or
increases in communications
Section 1-3
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