Omron SYSMAC CS Series Operation Manual page 117

Specifications
CS1 CPU Units
CPU CS1H-
CPU67-
EV1
I/O bits 5120
User 250K
program
memory
(steps)
(See note.)
Data 32K words
memory
Extended 32K words
data x 13 banks
memory
E0_00000
to
EC_32767
Current con- 1.10 A at 5 V DC
sumption
Connector One RS-232C Connector (Plug: XM2A-0901, Hood: XM2S-0911-E) provided with CPU Unit as standard
(provided)
Common Specifications
Item
Control method
I/O control method
Programming
CPU processing mode
Instruction length
Ladder instructions
Execution time
Overhead processing time
CS1H- CS1H-
CPU66- CPU65- CPU64-
EV1 EV1
120K 60K 30K
32K words 32K words 32K words
x 7 banks x 3 banks x 1 bank
E0_00000 E0_00000 E0_00000
to to to
E6_32767 E2_32767 E0_32767
Note The number of steps in a program is not the same as the number of instruc-
tions. For example, LD and OUT require 1 step each, but MOV(021) requires
3 steps. The program capacity indicates the total number of steps for all
instructions in the program. Refer to 10-5 Instruction Execution Times and
Number of Steps for the number of steps required for each instruction.
Stored program
Cyclic scan and immediate processing are both possible.
• Ladder diagrams
• SFC (sequential function charts)
• ST (structured text)
• Mnemonics
CS1-H CPU Units: Normal Mode, Parallel Processing Mode
with Asynchronous Memory Access, Parallel Processing
Mode with Synchronous Memory Access, or Peripheral Ser-
vicing Priority Mode
CS1 CPU Units, Pre-version: Normal Mode only
CS1 CPU Units, Version 1 or higher: Normal Mode or Periph-
eral Servicing Priority Mode
1 to 7 steps per instruction
Approx. 400 (3-digit function codes)
CS1-H CPU Units:
Basic instructions:
Special instructions: 0.06 µs min.
CS1 CPU Units:
Basic instructions:
Special instructions: 0.12 µs min.
CS1-H CPU Units:
Normal mode:
Parallel processing: 0.2 ms min.
CS1 CPU Units:
CS1H- CS1H- CS1G-
CPU63- CPU45-
EV1 EV1 EV1
20K 60K
Not sup- 32K words
ported x 3 banks
E0_00000
to
E2_32767
0.95 A at 5 V DC
Specification
0.02 µs min.
0.04 µs min.
0.3 ms min.
0.5 ms min.
Section 2-1
CS1G- CS1G-
CPU44- CPU43- CPU42-
EV1 EV1
1280 960
30K 20K 10K
32K words Not sup- Not
x 1 bank ported supported
E0_00000
to
E0_32767
Reference
---
---
---
---
Steps and number of
steps per instruction:
10-5 Instruction Execu-
tion Times and Num-
ber of Steps
---
Instruction execution
times: 10-5 Instruction
Execution Times and
Number of Steps
---
CS1G-
EV1
79