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Omron CJ - PROGRAMMING MANUAL 12-2009 Programming Manual

Programmable controllers
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Table of Contents

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Cat. No. W394-E1-14
SYSMAC CS Series
CS1G/H-CPU_-EV1, CS1G/H-CPU_H,
CS1D-CPU_H, CS1D-CPU_S
SYSMAC CJ Series
CJ1H-CPU_H-R, CJ1G-CPU_, CJ1G/H-CPU_H,
CJ1G-CPU_P, CJ1M-CPU_
SYSMAC One NSJ Series
Programmable Controllers
PROGRAMMING MANUAL

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Summary of Contents for Omron CJ - PROGRAMMING MANUAL 12-2009

  • Page 1 Cat. No. W394-E1-14 SYSMAC CS Series CS1G/H-CPU_-EV1, CS1G/H-CPU_H, CS1D-CPU_H, CS1D-CPU_S SYSMAC CJ Series CJ1H-CPU_H-R, CJ1G-CPU_, CJ1G/H-CPU_H, CJ1G-CPU_P, CJ1M-CPU_ SYSMAC One NSJ Series Programmable Controllers PROGRAMMING MANUAL...
  • Page 3 SYSMAC CS Series CS1G/H-CPU@@-EV1 CS1G/H-CPU@@H CS1D-CPU@@H CS1D-CPU@@S SYSMAC CJ Series CJ1H-CPU@@H-R CJ1G-CPU@@ CJ1G/H-CPU@@H CJ1G-CPU@@P CJ1M-CPU@@ SYSMAC One NSJ Series Programmable Controllers Programming Manual Revised December 2009...
  • Page 5  OMRON, 2001 All rights reserved. No part of this publication may be reproduced, stored in a retrieval system, or transmitted, in any form, or by any means, mechanical, electronic, photocopying, recording, or otherwise, without the prior written permission of OMRON.
  • Page 6 This applies to the CS1-H, CJ1-H, CJ1M, and CS1D CPU Units. Notation of Unit Versions The unit version is given to the right of the lot number on the nameplate of the on Products products for which unit versions are being managed, as shown below.
  • Page 7 Unit version Use the above display to confirm the unit version of the CPU Unit. Unit Manufacturing Information In the IO Table Window, right-click and select Unit Manufacturing informa- tion - CPU Unit. The following Unit Manufacturing information Dialog Box will be displayed.
  • Page 8 Unit version Use the above display to confirm the unit version of the CPU Unit connected online. Using the Unit Version The following unit version labels are provided with the CPU Unit. Labels These labels can be attached to the front of previous CPU Units to differenti- ate between CPU Units of different unit versions.
  • Page 9 Unit Version Notation In this manual, the unit version of a CPU Unit is given as shown in the follow- ing table. Product nameplate CPU Units on which no unit version is Units on which a version is given (Ver. @.@) given Lot No.
  • Page 10 Pre-Ver. 1.1 Single-CPU Systems Unit version 2.0 CS1D-CPU@@S CS1 CPU Units CS1@-CPU@@ No unit version. CS1@-CPU@@-V1 No unit version. CS1 Version-1 CPU Units CJ Series Units Models Unit version CJ1-H CPU Units CJ1H-CPU@@H-R Unit version 4.2 Unit version 4.1 Unit version 4.0 CJ1@-CPU@@H Unit version 4.0...
  • Page 11 4.0 or later cannot be used on CS/CJ-series CPU Units with unit ver- sion 3.0 or earlier. An error message will be displayed if an attempt is made to download programs containing unit version 4.0 functions to a CPU Unit with a unit version of 3.0 or earlier, and the download will not be possible.
  • Page 12 3.0 or later cannot be used on CS/CJ-series CPU Units with unit ver- sion 2.0 or earlier. An error message will be displayed if an attempt is made to download programs containing unit version 3.0 functions to a CPU Unit with a unit version of 2.0 or earlier, and the download will not be possible.
  • Page 13 • Functions Supported for Unit Version 2.0 or Later CX-Programmer 4.0 or higher must be used to enable using the functions added for unit version 2.0. CS1-H CPU Units Function CS1-H CPU Units (CS1@-CPU@@H) Unit version 2.0 or later Other unit versions...
  • Page 14 Network Levels Connecting Online to PLCs via NS-series Setting First Slot Words OK for up to 64 groups Automatic Transfers at Power ON without a Parameter File Automatic Detection of I/O Allocation Method for Automatic Transfer at Power ON Operation Start/End Times...
  • Page 15 2.0 or later cannot be used on CS/CJ-series Pre-Ver. 2.0 CPU Units. An error message will be displayed if an attempt is made to download pro- grams containing unit version s.0 functions to a Pre-Ver. 2.0 CPU Unit, and the download will not be possible.
  • Page 16 2. CX-Programmer version 7.1 or higher is required to use the new functions added for unit version 4.0 of the CJ1-H-R CPU Units. CX-Programmer ver- sion 7.22 or higher is required to use unit version 4.1 of the CJ1-H-R CPU Units. CX-Programmer version 7.0 or higher is required to use unit version 4.2 of the CJ1-H-R CPU Units.
  • Page 17 CPU Unit to a previous unit version. After the above message is displayed, a compiling error will be displayed on the Compile Tab Page in the Output Window. An attempt was to download a Check the settings in the PLC...
  • Page 18 xviii...

  • Page 19: Table Of Contents

    3-14 Double-precision Floating-point Instructions ........
  • Page 20 Serial Communications ........... . . Changing the Timer/Counter PV Refresh Mode........
  • Page 21 CS1D CPU Units. Please read this manual and all related manuals listed in the table on the next page and be sure you understand information provided before attempting to install or use CS/CJ-series CPU Units in a PLC System.
  • Page 22 Programming Device functions, and the Basic I/O Unit input response time settings. Section 7 describes the processes used to transfer the program to the CPU Unit and the functions that can be used to test and debug the program.
  • Page 23 Provides an outline of and describes the design, CS1D-CPU@@H CPU Units installation, maintenance, and other basic opera- CS1D-CPU@@S CPU Units tions for a Duplex System based on CS1D CPU CS1D-DPL1 Duplex Unit Units. CS1D-PA207R Power Supply Unit Duplex System Operation Manual...
  • Page 24 CX-One Setup Manual !WARNING Failure to read and understand the information provided in this manual may result in per- sonal injury or death, damage to the product, or product failure. Please read each section in its entirety and be sure you understand the information provided in the section and related sections before attempting any of the procedures or operations given.

  • Page 25: Precautions

    Conformance to EC Directives ........

  • Page 26: Intended Audience

    !WARNING It is extremely important that a PLC and all PLC Units be used for the speci- fied purpose and under the specified conditions, especially in applications that can directly or indirectly affect human life. You must consult with your OMRON representative before applying a PLC System to the above-mentioned appli- cations.
  • Page 27 !Caution Confirm safety before transferring data files stored in the file memory (Mem- ory Card or EM file memory) to the I/O area (CIO) of the CPU Unit using a peripheral tool. Otherwise, the devices connected to the output unit may mal- function regardless of the operation mode of the CPU Unit.

  • Page 28: Operating Environment Precautions

    PLC to which is mounted a non-insulated Unit (CS1W-CLK12/52(-V1) or CS1W-ETN01) connected to an external power supply. A short-circuit will be created if the 24 V side of the external power supply is grounded and the 0 V side of the peripheral device is grounded. When connecting a peripheral device to this type of PLC, either ground the 0 V side of the external power supply or do not ground the external power supply at all.

  • Page 29: Application Precautions

    • Always connect to a ground of 100 Ω or less when installing the Units. Not connecting to a ground of 100 Ω or less may result in electric shock. • A ground of 100 Ω or less must be installed when shorting the GR and LG terminals on the Power Supply Unit.
  • Page 30 BUSY indicator to go out before removing the Memory Card. • If the I/O Hold Bit is turned ON, the outputs from the PLC will not be turned OFF and will maintain their previous status when the PLC is switched from RUN or MONITOR mode to PROGRAM mode.
  • Page 31 • Do not pull on the cables or bend the cables beyond their natural limit. Doing either of these may break the cables. • Do not place objects on top of the cables or other wiring lines. Doing so may break the cables.

  • Page 32: Conformance To Ec Directives

    Conformance to EC Directives • Do not connect pin 6 (+5 V power supply line) of the RS-232C port on the CPU Unit to any external device except the CJ1W-CIF11 RS-422A Adapter, NT-AL001 RS-232C/RS-422A Adapter, or NV3W-M@20L Pro- grammable Terminal. Doing so may damage the external device or CPU Unit.

  • Page 33: Concepts

    EMC Directives OMRON devices that comply with EC Directives also conform to the related EMC standards so that they can be more easily built into other devices or the overall machine. The actual products have been checked for conformity to EMC standards (see the following note).
  • Page 34 (Refer to EN61000-6-4 for more details.) Countermeasures are not required if the frequency of load switching for the whole system with the PLC included is less than 5 times per minute. Countermeasures are required if the frequency of load switching for the whole system with the PLC included is more than 5 times per minute.
  • Page 35 Conformance to EC Directives Countermeasure 1 Countermeasure 2 Providing a dark current of Providing a limiting resistor approx. one-third of the rated value through an incandescent lamp xxxv...
  • Page 36 Conformance to EC Directives xxxvi...
  • Page 37 WHETHER SUCH CLAIM IS BASED ON CONTRACT, WARRANTY, NEGLIGENCE, OR STRICT LIABILITY. In no event shall the responsibility of OMRON for any act exceed the individual price of the product on which liability is asserted. IN NO EVENT SHALL OMRON BE RESPONSIBLE FOR WARRANTY, REPAIR, OR OTHER CLAIMS...
  • Page 38 The following are some examples of applications for which particular attention must be given. This is not intended to be an exhaustive list of all possible uses of the products, nor is it intended to imply that the uses listed may be suitable for the products: •...
  • Page 39 PERFORMANCE DATA Performance data given in this manual is provided as a guide for the user in determining suitability and does not constitute a warranty. It may represent the result of OMRON's test conditions, and the users must correlate it to actual application requirements.

  • Page 41: Cpu Unit Operation

    Using the Internal Clock (CS1 CPU Units Only) ..... . Internal Structure of the CPU Unit ....... . .

  • Page 42: Initial Setup (Cs1 Cpu Units Only)

    Section 1-1 Initial Setup (CS1 CPU Units Only) Battery Installation Before using a CS1CPU Unit, you must install the Battery Set in the CPU Unit using the following procedure. 1,2,3... 1. Insert a flat-blade screwdriver in the small gap at the bottom of the battery...
  • Page 43 Section 1-1 Initial Setup (CS1 CPU Units Only) 2. Hold the Battery Set with the cable facing outward and insert it into the bat- tery compartment. Battery compartment 3. Connect the battery connector to the battery connector terminals. Connect the red wire to the top and the white wire to the bottom terminal. There are two sets of battery connector terminals;...
  • Page 44 Errors can also be cleared from the CX-Programmer. Refer to the CX-Pro- grammer Operation Manual for the actual procedure. Note When an Inner Board is mounted, an Inner Board routing table error may con- tinue even after you have cancelled the error using the CX-Programmer.

  • Page 45: Using The Internal Clock (Cs1 Cpu Units Only)

    Using the Internal Clock (CS1 CPU Units Only) Using the Internal Clock (CS1 CPU Units Only) The internal clock of the CPU Unit is set to “00 year, 01 month, 01 day (00-01- 01), 00 hours, 00 minutes, 00 seconds (00:00:00), and Sunday (SUN)” when the Battery Set is mounted in the CS-series CPU Unit.

  • Page 46: Internal Structure Of The Cpu Unit

    The tasks are transferred to the CPU Unit from the CX-Programmer programming software. There are two types of tasks. The first is a cyclic task that is executed once per cycle (maximum of 32) and the other is an interrupt task that is executed only when the interrupt conditions occur (maximum of 256).

  • Page 47: Block Diagram Of Cpu Unit Memory

    Parameter Area (PLC Setup, Registered I/O Tables, Routing Tables, and CPU Bus Unit Settings) If the PLC Setup's Detect Low Battery setting is set to Do not detect, this data is backed up in the internal flash memory. The data is automatically backed up...
  • Page 48 FB program memory area. Note 1. The BKUP indicator on the front of the CPU Unit will light while data is be- ing written to flash memory. Do not turn OFF the power supply to the CPU Unit until the backup operation has been completed (i.e., until the BKUP indicator goes out).

  • Page 49: Operating Modes

    PROGRAM mode). Confirm safety thoroughly in advance before changing the status of any part of memory allocated to I/O Units, Special I/O Units, or CPU Bus Units. Any changes to the data allocated to any Unit may result in unex- pected operation of the loads connected to the Unit.

  • Page 50: Initialization Of I/O Memory

    2. Held areas: Holding Area, DM Area, EM Area, Counter PVs, and Counter Completion Flags. 3. Data in I/O memory will be retained when the IOM Hold Bit (A50012) is ON. When the IOM Hold Bit (A50012) is ON and operation is stopped due to a fatal error (including FALS(007)), the contents of I/O memory will be re- tained but outputs on Output Units will all be turned OFF.

  • Page 51: Startup Mode

    Refer to the Operation Manual for details on the Startup Mode setting for the CPU Unit. Note The CPU Unit will start in RUN Mode if the PLC Setup's Mode Setting is set to Use Programming Console but a Programming Console is not connected.
  • Page 52 Operating Modes Section 1-4 Power turned ON. The CPU Unit will start in PLC Setup set the mode set in the PLC for mode on Setup. Programming Console? The CPU Unit will start in Programming the mode set on the Console Programming Console.

  • Page 53: Programs And Tasks

    I/O refreshing In the above example, programming would be executed in the following order: start of A, B, remainder of A, C, and then D. This assumes that the interrupt condition for interrupt task 100 was established during execution of program A.
  • Page 54 I/O refreshing A task that has been executed will be executed in subsequent cycles, and a task that is on standby will remain on standby in subsequent cycles unless it is executed again from another task. Note Unlike earlier programs that can be compared to reading a scroll, tasks can be compared to reading through a series of individual cards.

  • Page 55: Description Of Tasks

    Section 1-6 Description of Tasks • A card that is activated will remain activated and will be read in subse- quent sequences. A card that is deactivated will remain deactivated and will be skipped until it is reactivated by another card.
  • Page 56 Section 1-6 Description of Tasks A total of 288 tasks with 288 programs can be created and controlled with the CX-Programmer. These include up to 32 cyclic tasks and 256 interrupt tasks. Note 1. CJ1 CPU Units do not currently support I/O interrupt tasks and external in- terrupt tasks.
  • Page 57 I/O status that was maintained. Example: Programming with a Control Task In this example, task 0 is a control task that is executed first at the start of operation. Other tasks can be set from the CX-Programmer (but not a Pro- gramming Console) to start or not to start at the beginning of operation.
  • Page 58 Section 1-6 Description of Tasks Put task 1 on Start task 1 standby when when a is b is ON. Task 0 Task 0 Task 0 Task 1 Task 1 Task 1 Task 2 Task 2 Task 2 Task 3...
  • Page 59 Task 1 is set to be executed at the start of operation unconditionally. Task 1 executable when a is ON. Task 1 put on standby when b is ON. Task 2 is executable when c is ON and task 1 has been executed. Start task 1 Put task 1...
  • Page 60 Description of Tasks Task Execution Time While a task is on standby, instructions in that task are not executed, so their OFF instruction execution time will not be added to the cycle time. Note From this standpoint, instructions in a task that is on standby are just like instructions in a jumped program section (JMP-JME).

  • Page 61: Programming

    Programs and Tasks ........

  • Page 62: Basic Concepts

    Programming Console Programs are accessed and edited on a Programming Console by specifying CT00 to CT 31 for cyclic tasks and IT00 to IT255 for interrupt tasks. When the memory clear operation is performed with a Programming Console, only cyclic task 0 (CT00) can be written in a new program. Use CX-Programmer to...

  • Page 63: Basic Information On Instructions

    (destinations) Memory Power Flow The power flow is the execution condition that is used to control the execute and instructions when programs are executing normally. In a ladder program, power flow represents the status of the execution condition. Input Instructions •...
  • Page 64 Basic Concepts Section 2-1 are reset (canceled) at the start of each task, i.e., they are reset when the task changes. The following instructions are used in pairs to set and cancel certain instruc- tion conditions. These paired instructions must be in the same task.

  • Page 65: Instruction Location And Execution Conditions

    Section 2-1 Basic Concepts Note Operands are also called the first operand, second operand, and so on, start- ing from the top of the instruction. First operand Second operand 2-1-3 Instruction Location and Execution Conditions The following table shows the possible locations for instructions. Instructions are grouped into those that do and those do not require execution conditions.

  • Page 66: Addressing I/O Memory Areas

    Word Addresses @@@@ Indicates the word address Example: The address of bits 00 to 15 in word 0010 in the CIO Area would be as shown below. This address is given as “CIO 0010” in this manual. 0010 Word address DM and EM Areas addresses are given with “D”...

  • Page 67: Specifying Operands

    Example: The address of word 2000 in the current bank of the Extended Data Memory would be as follows: E00200 Word address The address of word 2000 in the bank 1 of the Extended Data Memory would be as follows: E1_00200 Word address...
  • Page 68 Note When specifying an indirect address in Binary Mode, treat Data Memory (DM) and Extended Data Memory (EM) (banks 0 to C) as one series of addresses. If the contents of an address with the @ symbol exceeds 32767, the address will be assumed to be an address in the Extended Data Mem- ory (EM) continuing on from 00000 in bank No.
  • Page 69 Operand Description Notation Application examples Specifying a An index register (IR) or a data register (DR) is speci- MOVR 000102 IR0 register fied directly by specifying IR@ (@: 0 to 15) or DR@ Stores the PLC memory address for directly (@: 0 to 15).
  • Page 70 All binary data or Unsigned binary #0000 to #FFFF MOV #0100 D00000 stant a limited range of Stores #0100 hex (&256 dec- binary data imal) in D00000. +#0009 #0001 D00001 Stores #000A hex (&10 deci- mal) in D00001. MOV −100 D00000 Signed decimal ±...
  • Page 71 + 1 if there is an even number of characters. ASCII characters that can be used in a text string includes alphanumeric characters, Katakana and sym- bols (except for special characters). The characters are shown in the following table.

  • Page 72: Data Formats

    Section 2-1 Basic Concepts 2-1-6 Data Formats The following table shows the data formats that the CS/CJ Series can handle. Data type Data format Decimal 4-digit hexadecimal Unsigned &0 to &65535 #0000 to #FFFF 15 14 13 12 11 10 9...
  • Page 73 In signed binary data, the leftmost bit indicates the sign of binary 16-bit data. The value is expressed in 4-digit hexadecimal. Positive Numbers: A value is positive or 0 if the leftmost bit is 0 (OFF). In 4- digit hexadecimal, this is expressed as 0000 to 7FFF Hex.
  • Page 74 Generally the complement of base x refers to a number produced when all digits of a given number are subtracted from x – 1 and then 1 is added to the rightmost digit. (Example: The ten’s complement of 7556 is 9999 – 7556 + 1 = 2444.) A complement is used to express a subtraction and other functions as...

  • Page 75: Instruction Variations

    #8000 −32769 Not applicable. Not applicable. 2-1-7 Instruction Variations The following variations are available for instructions to differentiate executing conditions and to refresh data when the instruction is executed (immediate refresh). Variation Symbol Description Differentiation Instruction that differentiates when the execu- tion condition turns ON.

  • Page 76: Execution Conditions

    Input instructions that create logical starts and intermediate instructions read bit status, make comparisons, test bits, or perform other types of processing every cycle. If the results are ON, power flow is output (i.e., the execution con- dition is turned ON).
  • Page 77 • Input Instructions (Logical Starts and Intermediate Instructions): The instruction reads bit status, makes comparisons, tests bits, or perform other types of processing every cycle and will output an ON execution condition (power flow) when results switch from OFF to ON. The execu- tion condition will turn OFF the next cycle.
  • Page 78 Bit B Note Unlike the upwardly differentiated instructions, downward differentia- tion variation (%) can only be added to LD, AND, OR, SET and RSET instructions. To execute downward differentiation with other instruc- tions, combine the instructions with a DIFD or a DOWN instruction.

  • Page 79: I/O Instruction Timing

    Section 2-1 Basic Concepts condition (power flow stops) when results switch from ON to OFF. The execution condition will turn ON the next cycle. Example 0001 Downwardly differentiated input instruction OFF execution condition created for one cycle only when CIO 00103 goes from ON to OFF.
  • Page 80 Differentiated Instructions • A differentiated instruction has an internal flag that tells whether the previ- ous value is ON or OFF. At the start of operation, the previous value flags for upwardly differentiated instruction (DIFU and @ instructions) are set to ON and the previous value flags for downwardly differentiated instructions (DIFD and % instructions) are set to OFF.

  • Page 81: Refresh Timing

    Manual for details on the I/O refresh. Cyclic Refresh Every program allocated to a ready cyclic task or a task where interrupt condi- tion has been met will execute starting from the beginning program address and will run until the END(001) instruction. After all ready cyclic tasks or tasks where interrupt condition have been met have executed, cyclic refresh will refresh all I/O points at the same time.
  • Page 82 Basic Concepts Section 2-1 • When a word operand is specified for an instruction, I/O will be refreshed for the 16 bits that are specified. • Inputs will be refreshed for input or source operand just before an instruc- tion is executed.
  • Page 83 • IORF(097): I/O REFRESH IORF(097) can immediately refresh a specified range of I/O words in the CIO Area, or a range of CIO words allocated to Special I/O Units. • FIORF(225): SPECIAL I/O UNIT I/O REFRESH (See note 2.) FIORF(225) can immediately refresh the words allocated to a specified Special I/O Unit.

  • Page 84: Program Capacity

    2-1-11 Program Capacity The maximum program capacities of the CS/CJ-series CPU Units for all user programs (i.e., the total capacity of all tasks) are given in the following table. All capacities are given as the maximum number of steps. The capacities must not be exceeded, and writing the program will be disabled if an attempt is made to exceed the capacity.

  • Page 85: Basic Ladder Programming Concepts

    Section 2-1 Basic Concepts of steps in each instruction. (The length of each instruction will increase by 1 step if a double-length operand is used.) Series CPU Unit Max. program capacity I/O points CS Series CS1H-CPU67H/CPU67-E 250K steps 5,120 CS1D-CPU67H...
  • Page 86 A program consists of one or more program runs. A program rung is a unit that can be partitioned when the bus is split horizontally. In mnemonic form, a rung is all instructions from a LD/LD NOT instruction to the output instruction just before the next LD/LD NOT instructions.
  • Page 87 In circuit “b,” contact E included cannot be written in a ladder diagram. The program must be rewritten. 2. There is no limit to the number of I/O bits, work bits, timers, and other input bits that can be used. Rungs, however, should be kept as clear and simple as possible even if it means using more input bits to make them easier to understand and maintain.
  • Page 88 1. A ladder program must be closed so that signals (power flow) will flow from the left bus bar to the right bus bar. A rung error will occur if the program is not closed (but the program can be executed).
  • Page 89 Section 2-1 Basic Concepts 3. An input bit must always be inserted before and never after an output in- struction like an output bit. If it is inserted after an output instruction, then a location error will occur during a Programming Device program check.

  • Page 90: Inputting Mnemonics

    Create a single rung consisting of two instruction blocks using an AND LD instruction to AND the blocks or by using an OR LD instruction to OR the blocks. The following example shows a complex rung that will be used to...
  • Page 91 Section 2-1 Basic Concepts 1,2,3... 1. First separate the rung into small blocks (a) to (f). 0000 0000 0000 0000 0000 0000 0005 0010 0010 0000 0005 0000 0000 0000 0000 0010 0010 0000 0000 0000 0005...
  • Page 92 Section 2-1 Basic Concepts • Program the blocks from top to bottom and then from left to right. 0000 0000 0010 0010 LD 000000 LD 001000 AND 000001 AND 001001 OR LD 0005 0000 0000 OR 000500 LD 000004 AND 000005...

  • Page 93: Program Examples

    000000 0002 000001 000200 000002 AND NOT 000003 A block B block 000200 Program the parallel instruction in the A block and then the B block. 2. Series/Parallel Rungs 0000 0000 0000 0000 0002 Instruction Operands 000000 0002 AND NOT...
  • Page 94 OR LD. Program B and B the same way. Connect A block and B block with an AND LD. Repeat for as many A to n blocks as are present. 0005 A block B block C block...
  • Page 95 0000 0000 000001 0000 0000 000002 000003 0000 0000 OR LD The diagram above is based on the diagram below. AND LD 0000 0000 0000 000004 000005 OR LD A simpler program can be written by rewriting 000006 this as shown below.
  • Page 96 5. Rungs Requiring Caution or Rewriting OR and OL LD Instructions With an OR or OR NOT instruction, an OR is taken with the results of the lad- der logic from the LD or LD NOT instruction to the OR or OR NOT instruction, so the rungs can be rewritten so that the OR LD instruction is not required.
  • Page 97 CIO 000210 can be turned ON for one cycle. Rungs Requiring Rewriting PLCs execute instructions in the order the mnemonics are entered so the sig- nal flow (power flow) is from left to right in the ladder diagram. Power flows from right to left cannot be programmed. 0000...

  • Page 98: Precautions

    Condition Flag Example: = Instruction B If the Condition Flag is connected directly to the left bus bar, instruction B will be executed based on the execution results of a previous rung if instruction A is not executed. Note When interrupt tasks are being used, an interrupt task will operate when its start conditions are met, even during execution of a cyclic task.
  • Page 99 Reflects instruction B execution results. Condition Flag Example: = Make sure each of the results is picked up once by an OUTPUT instruction to ensure that execution results for instruction B will be not be picked up. Instruction A Reflects instruction A execution results.
  • Page 100 #0200 will be moved to D00200 for instruction (1), but then the Equals Flag will be turned OFF because the #0200 source data is not 0000 Hex. The MOV instruction at (2) will then be executed and #0300 will be moved to D0300. A rung will therefore have to be inserted as shown below to prevent execution results for the first MOVE instruction from being picked up.
  • Page 101 (rather than execution results for the differentiated instruction) will be reflected in Condition Flags in the next cycle. You must therefore be aware of what Condition Flags will do in the next cycle if execution results for differ- entiated instructions to be used.
  • Page 102 ER Flag turns ON. When the ER Flag is ON, the status of other Condition Flags, such as the <, >, OF, and UF Flags, will not change and status of the = and N Flags will vary from instruction to instruction.

  • Page 103: Special Program Sections

    In this case, words will be taken in order of the PLC memory addresses. The Error Flag will not turn ON.
  • Page 104 (Therefore, a subrou- tine cannot be placed in a step ladder, block program, FOR - NEXT, or JMP0 - JME0 section.) If a program other than a subroutine program is placed after a subroutine program (SBN to RET), that program will not be executed.
  • Page 105 BLOCK PROGRAM PAUSE and RESTART Note 1. A step ladder program section can be used in an interlock section (be- tween IL and ILC). The step ladder section will be completely reset when the interlock is ON. 2. A step ladder program section can be used between MULTIPLE JUMP...
  • Page 106 1. Block programs can be used in a step ladder program section. 2. A block program can be used in an interlock section (between IL and ILC). The block program section will not be executed when the interlock is ON.

  • Page 107: Checking Programs

    The user program can be checked in the CX-Programmer. When the program is checked, the user can specify program check in any of four levels: A, B, or C (in order of the seriousness of the errors) or a custom check level.
  • Page 108 Here, data required at the beginning of instruction processing was checked and as a result, the instruction was not executed, the ER Flag (Error Flag) will be turned ON and the EQ and N Flags may be retained or turned OFF depending upon the instruction.

  • Page 109: Checking Fatal Errors

    CS/CJ-series Programming Device (including Programming Consoles). In the rare even that this error does occur, it will be treated as a program error, operation will stop (fatal error), and the Illegal Instruction Flag (A29514) will turn ON.
  • Page 110 ON), FFFFFFFF Hex will be stored in A298/ A299. Note If the Error Flag or Access Error Flag turns ON, it will be treated as a program error and it can be used to stop the CPU from running. Specify operation for...
  • Page 111 Section 2-3 Program error Description Related flags No END Instruction An END instruction is not present in the The No END Flag (A29511) turns ON. program. Error During Task Execution No task is ready in the cycle. The Task Error Flag (29512) turns ON.
  • Page 112 Checking Programs Section 2-3...

  • Page 113: Instruction Functions

    Increment/Decrement Instructions ........

  • Page 114: Sequence Input Instructions

    @LD NOT %LD NOT !LD NOT !@LD NOT Starting !%LD NOT point of block Takes a logical AND of the status of the specified operand bit and the Continues on rung current execution condition. Required @AND %AND !AND !@AND !%AND...
  • Page 115 LD, AND, and OR; the execution condition is ON when the LD TST Not required specified bit in the specified word is ON and OFF when the bit is OFF. S: Source word N: Bit number BIT TEST...

  • Page 116: Sequence Output Instructions

    TST(350) gram like LD, AND, and OR; the execution condition is ON when the OR TST Required specified bit in the specified word is ON and OFF when the bit is OFF. S: Source word N: Bit number BIT TEST...
  • Page 117 SETB(532) turns ON the specified bit in the specified word when the Output (CS1-H, CJ1-H, SETB(532) execution condition is ON. Required CJ1M, or CS1D Unlike the SET instruction, SETB(532) can be used to set a bit in a DM only) or EM word. SETB @SETB !SETB D: Word address...
  • Page 118 RSTB(533) turns OFF the specified bit in the specified word when the Output RSTB(533) RESET (CS1-H, execution condition is ON. Required CJ1-H, CJ1M, or Unlike the RSET instruction, RSTB(533) can be used to reset a bit in a CS1D only) DM or EM word. RSTB @RSTB !RSTB D: Word address...

  • Page 119: Sequence Control Instructions

    Indicates the end of a program. END(001) Not required END(001) completes the execution of a program for that cycle. No instructions written after END(001) will be executed. Execution proceeds to the program with the next task number. When the program being executed has the highest task number in the program, END(001) marks the end of the overall main program.
  • Page 120 MILH(517) and MILC(519) are used as a pair. HOLD MILH(517)/MILC(519) interlocks can be nested (e.g., MILH(517)— MILH MILH(517)—MILC(519)—MILC(519)). If there is a differentiated instruction (DIFU, DIFD, or instruction with a @ CS/CJ -series CPU N: Interlock number Unit Ver. 2.0 or later...
  • Page 121 The operation of CJP(510) is the basically the opposite of JMP(004). CJP(510) JUMP Required When the execution condition for CJP(510) is ON, program execution jumps directly to the first JME(005) in the program with the same jump number. CJP(510) and JME(005) are used in pairs. N: Jump number Execution Execution...
  • Page 122 Repeated N times loops Repeated program section BREAK LOOP Output Programmed in a FOR-NEXT loop to cancel the execution of the loop BREAK(514) BREAK for a given execution condition. The remaining instructions in the loop Required are processed as NOP(000) instructions.

  • Page 123: Timer And Counter Instructions

    Output TIM/TIMX(550) operates a decrementing timer with units of 0.1-s. TIMER Required The setting range for the set value (SV) is 0 to 999.9 s for BCD and 0 to 6,553.5 s for binary (decimal or hexadecimal). (BCD) Timer input...
  • Page 124 ONE-MS TIMER TMHH(540)/TMHHX(552) operates a decrementing timer with units of Output TMHH(540) 1-ms. The setting range for the set value (SV) is 0 to 9.999 s for BCD TMHH Required and 0 to 65.535 s for binary (decimal or hexadecimal).
  • Page 125 TTIM(087)/TTIMX(555) operates an incrementing timer with units of TTIM(087) input TIMER Required 0.1-s. The setting range for the set value (SV) is 0 to 999.9 s for TTIM BCD and 0 to 6,553.5 s for binary (decimal or hexadecimal). (BCD) Timer input...
  • Page 126 MTIM(543) TIMER Required independent SVs and Completion Flags. The setting range for the MTIM set value (SV) is 0 to 999.9 s for BCD and 0 to 6,553.5 s for binary (decimal or hexadecimal). (BCD) Timer PV MTIMX D1: Completion...
  • Page 127 Completion Flag RESET TIMER/ CNR(545)/CNRX(547) resets the timers or counters within the speci- Output CNR(545) COUNTER fied range of timer or counter numbers. Sets the set value (SV) to the Required maximum of 9999. @CNR (BCD) : 1st number in...

  • Page 128: Comparison Instructions

    32-bit binary data and create an ON execution condition when Required : Comparison the comparison condition is true. There are three types of symbol com- LD, AND, OR + =, data 2 parison instructions, LD (LOAD), AND, and OR.
  • Page 129 Symbol AND, and OR. Time values (year, month, day, hour, minute, and sec- DT, <> DT, < DT, ond) can be masked/unmasked in the comparison so it is easy to create <= DT, > DT, >= calendar timer functions. 341 (= DT) 342 (<>...
  • Page 130 Compares the source data to 16 ranges (defined by 16 lower limits BCMP(068) BLOCK COM- Required and 16 upper limits) and turns ON the corresponding bit in the result PARE word when the source data is within the range. BCMP...
  • Page 131 AREA RANGE Compares the 16-bit unsigned binary value in CD (word contents or Output ZCP(088) COMPARE constant) to the range defined by LL and UL and outputs the results to Required the Arithmetic Flags in the Auxiliary Area. @ZCP (CS1-H, CJ1-H,...

  • Page 132: Data Movement Instructions

    @MOVL Bit status not S: 1st source changed. word D: 1st destination word MOVE NOT Output Transfers the complement of a word of data to the specified word. MVN(022) Required Source word @MVN S: Source Bit status D: Destination inverted.
  • Page 133 Instruction Symbol/Operand Function Location Mnemonic Execution condition Code MOVE DIGIT Output Transfers the specified digit or digits. (Each digit is made up of 4 bits.) MOVD(083) MOVD Required @MOVD S: Source word or data C: Control word D: Destination word...
  • Page 134 @DIST S: Source word Bs: Destination base address Of: Offset Bs+n DATA COLLECT Output Transfers the source word (calculated by adding an offset value to the COLL(081) COLL Required base address) to the destination word. @COLL Bs+n Bs: Source base...

  • Page 135: Data Shift Instructions

    Status of data Lost St: Starting word input for each E: End word shift input REVERSIBLE Output Creates a shift register that shifts data to either the right or the left. SFTR(084) SHIFT REGISTER Required SFTR @SFTR Data input Shift...
  • Page 136 Shifts all Wd bits one bit to the left including the Carry Flag (CY). ROL(027) Required @ROL Wd: Word DOUBLE Output Shifts all Wd and Wd +1 bits one bit to the left including the Carry Flag ROTATE LEFT ROLL(572) Required (CY). ROLL Wd+1...
  • Page 137 @RRNC Wd: Word DOUBLE Output Shifts all Wd and Wd +1 bits one bit to the right not including the Carry ROTATE RIGHT RRNL(577) Required Flag (CY). The contents of the rightmost bit of Wd +1 is shifted to the WITHOUT leftmost bit of Wd, and to the Carry Flag (CY).
  • Page 138 Instruction Symbol/Operand Function Location Mnemonic Execution condition Code SHIFT N-BITS Output Shifts the specified 16 bits of word data to the left by the specified NASL(580) LEFT Required number of bits. NASL @NASL D: Shift word Shift n-bits C: Control word Contents of "a"...

  • Page 139: Increment/Decrement Instructions

    Instruction Symbol/Operand Function Location Mnemonic Execution condition Code INCREMENT Output Increments the 4-digit hexadecimal content of the specified word by 1. BINARY ++(590) Required Wd: Word DOUBLE INCRE- Output Increments the 8-digit hexadecimal content of the specified words by ++L(591)

  • Page 140: Symbol Math Instructions

    Ad: 1st addend word R: 1st result word SIGNED BINARY Output Adds 4-digit (single-word) hexadecimal data and/or constants with the +C(402) ADD WITH Required Carry Flag (CY). CARRY (Signed binary) (Signed binary) Au: Augend word...
  • Page 141 Au: 1st augend when there is a word carry. Ad: 1st addend word R: 1st result word BCD ADD WITH Output Adds 4-digit (single-word) BCD data and/or constants with the Carry +BC(406) CARRY Required Flag (CY). (BCD) @+BC (BCD) Au: Augend word...
  • Page 142 Mi: 1st minuend ON when there word is a borrow. Su: 1st subtrahend word R: 1st result word BCD SUBTRACT Output Subtracts 4-digit (single-word) BCD data and/or constants with the −BC(416) WITH CARRY Required Carry Flag (CY). –BC (BCD) @–BC (BCD) −...
  • Page 143 Section 3-9 Symbol Math Instructions Instruction Symbol/Operand Function Location Mnemonic Execution condition Code DOUBLE BCD Output Subtracts 8-digit (double-word) BCD data and/or constants with the −BCL(417) SUBTRACT Required Carry Flag (CY). WITH CARRY (BCD) –BCL Mi +1 @–BCL (BCD) Su+1 −...
  • Page 144 Section 3-9 Symbol Math Instructions Instruction Symbol/Operand Function Location Mnemonic Execution condition Code BCD MULTIPLY Output Multiplies 4-digit (single-word) BCD data and/or constants. *B(424) Required (BCD) × (BCD) Md: Multiplicand (BCD) R +1 word Mr: Multiplier word R: Result word...

  • Page 145: Conversion Instructions

    Converts BCD data to binary data. BIN(023) Required @BIN (BCD) (BIN) S: Source word R: Result word DOUBLE BCD- Output Converts 8-digit BCD data to 8-digit hexadecimal (32-bit binary) data. BINL(058) TO-DOUBLE Required BINARY (BCD) (BIN) BINL @BINL (BCD) (BIN)
  • Page 146 Conversion Instructions Instruction Symbol/Operand Function Location Mnemonic Execution condition Code BINARY-TO-BCD Output Converts a word of binary data to a word of BCD data. BCD(024) Required @BCD (BIN) (BCD) S: Source word R: Result word DOUBLE Output Converts 8-digit hexadecimal (32-bit binary) data to 8-digit BCD data.
  • Page 147 Location Mnemonic Execution condition Code DATA DECODER Output Reads the numerical value in the specified digit (or byte) in the source MLPX(076) MLPX Required word, turns ON the corresponding bit in the result word (or 16-word @MLPX range), and turns OFF all other bits in the result word (or 16-word range).
  • Page 148 Location Mnemonic Execution condition Code DATA ENCODER Output FInds the location of the first or last ON bit within the source word (or DMPX(077) DMPX 16-word range), and writes that value to the specified digit (or byte) in Required @DMPX the result word.
  • Page 149 16 consecutive words) to the 16 bits of the destination word. LINE @LINE 0 0 0 1 1 1 1 0 0 0 1 0 0 0 0 1 S: 1st source 1 1 0 1 0 0 1 0 0 1 1 1 0 0 0 1...
  • Page 150 Conversion Instructions Instruction Symbol/Operand Function Location Mnemonic Execution condition Code SIGNED BCD- Output Converts one word of signed BCD data to one word of signed binary BINS(470) TO-BINARY Required data. BINS @BINS Signed BCD format specified in C Signed BCD...
  • Page 151 #FFFF FFFF FFFF FFFF) to ASCII data (16 characters). Required ASCII STR16 @STR16 S: Numeric D: ASCII text Hexadecimal: #1234567890ABCDEF ASCII ASCII TO FOUR- Converts 4 characters of ASCII data to a 4-digit hexadecimal number. Output DIGIT NUMBER NUM4 Required NUM4 @NUM4 ASCII S: ASCII text D: Numeric...

  • Page 152: Logic Instructions

    Logic Instructions Section 3-11 Instruction Symbol/Operand Function Location Mnemonic Execution condition Code ASCII TO EIGHT- Converts 8 characters of ASCII data to an 8-digit hexadecimal number. Output NUM8 DIGIT NUMBER Required NUM8 @NUM8 S: ASCII text D: Numeric ASCII Hexadecimal...
  • Page 153 Instruction Symbol/Operand Function Location Mnemonic Execution condition Code LOGICAL OR Output Takes the logical OR of corresponding bits in single words of word ORW(035) Required data and/or constants. @ORW →R : Input 1 : Input 2 R: Result word DOUBLE...

  • Page 154: Special Math Instructions

    Wd → Wd: 1 → 0 and 0 → 1 @COM Wd: Word DOUBLE COM- Output Turns OFF all ON bits and turns ON all OFF bits in Wd and Wd+1. PLEMENT COML(614) Required (Wd+1, Wd) → (Wd+1, Wd) COML...

  • Page 155: Floating-Point Math Instructions

    Dd: 1st dividend Dr+1 Dd+1 word Dr: 1st divisor word R: 1st result word BIT COUNTER Output Counts the total number of ON bits in the specified word(s). BCNT(067) BCNT Required @BCNT N words Counts the number of ON bits. −...
  • Page 156 Instruction Symbol/Operand Function Location Mnemonic Execution condition Code 32-BIT TO Output Converts a 32-bit signed binary value to 32-bit floating-point data and FLTL(453) FLOATING Required places the result in the specified result words. FLTL @FLTL Signed binary data (32 bits)
  • Page 157 S: 1st source word Result (degrees, 32-bit R: 1st result word floating-point data) SINE Output Calculates the sine of a 32-bit floating-point number (in radians) and SIN(460) Required places the result in the specified result words. @SIN S: 1st source word...
  • Page 158 Calculates the arc sine of a 32-bit floating-point number and places ASIN(463) ASIN Required the result in the specified result words. (The arc sine function is the @ASIN inverse of the sine function; it returns the angle that produces a given sine value between −1 and 1.) S: 1st source −1...
  • Page 159 FLOATING SYM- Compares the specified single-precision data (32 bits) or constants Using LD: BOL COMPARI- and creates an ON execution condition if the comparison result is true. Not required SON (CS1-H, Symbol, option Three kinds of symbols can be used with the floating-point symbol CJ1-H, CJ1M, or comparison instructions: LD (Load), AND, and OR.
  • Page 160 Converts the specified text string (ASCII) representation of single-pre- Output required ING-POINT (CS1- FVAL(449) cision floating-point data (decimal-point or exponential format) to 32-bit H, CJ1-H, CJ1M, single-precision floating-point data and outputs the result to the desti- or CS1D only) nation words. FVAL @FVAL S: Source word...

  • Page 161: Double-Precision Floating-Point Instructions

    Code DOUBLE FLOAT- Converts the specified double-precision floating-point data (64 bits) to 16- Output ING TO 16-BIT FIXD(841) bit signed binary data and outputs the result to the destination word. Required BINARY FIXD @FIXD S: 1st source word D: Destination...
  • Page 162 R: 1st result word DOUBLE SINE Calculates the sine of the angle (radians) in the specified double-precision Output SIND(851) floating-point data (64 bits) and outputs the result to the result words. SIND Required @SIND S: 1st source word R: 1st result word...
  • Page 163 (64 bits) and outputs the result to the Required result words. (The arc sine function is the inverse of the sine function; it ASIND returns the angle that produces a given sine value between -1 and 1.)
  • Page 164 Code DOUBLE LOGA- Calculates the natural (base e) logarithm of the specified double-precision Output LOGD(859) RITHM floating-point data (64 bits) and outputs the result to the result words. Required LOGD @LOGD S: 1st source word R: 1st result word...

  • Page 165: Table Data Processing Instructions

    TB+2 TB+2 address PUSH(632) TB+3 TB+3 S: Source word LAST IN FIRST Output Reads the last word of data written to the specified stack (the newest LIFO(634) Required data in the stack). LIFO @LIFO Stack Internal I/O Internal I/O pointer...
  • Page 166 Location Mnemonic Execution condition Code DIMENSION Output Defines a record table by declaring the length of each record and the RECORD TABLE DIM(631) Required number of records. Up to 16 record tables can be defined. @DIM Table number (N) Record 1...
  • Page 167 Min. value word R1+(W−1) R1: 1st word in range D: Destination word Output Adds the bytes or words in the range and outputs the result to two SUM(184) Required words. @SUM C: 1st control word R1: 1st word in R1+(W−1)
  • Page 168 Instruction Symbol/Operand Function Location Mnemonic Execution condition Code STACK SIZE Counts the amount of stack data (number of words) in the specified stack. Output required SNUM(638) READ (CS1-H, CJ1-H, CJ1M, or CS1D only) SNUM @SNUM TB: First stack address D: Destination...

  • Page 169: Data Control Instructions

    CJ1M only) S: Input word C: 1st parameter word D: Output word LIMIT CONTROL Output Controls output data according to whether or not input data is within LMT(680) Required upper and lower limits. @LMT S: Input word Upper limit...
  • Page 170 TIME-PROPOR- Inputs the duty ratio or manipulated variable from the specified word, Output TIONAL OUTPUT converts the duty ratio to a time-proportional output based on the speci- Required TPO (685) fied parameters, and outputs the result from the specified output.
  • Page 171 SCALING 2 Output Converts signed binary data into signed BCD data according to the SCL2(486) SCL2 Required specified linear function. An offset can be input in defining the linear @SCL2 function. Positive Offset Negative Offset R (signed BCD) R (signed BCD)
  • Page 172 SCALING 3 Output Converts signed BCD data into signed binary data according to the SCL3(487) SCL3 Required specified linear function. An offset can be input in defining the linear @SCL3 function. Positive Offset Negative Offset R (signed binary) R (signed binary)

  • Page 173: Subroutine Instructions

    MACRO Output Calls the subroutine with the specified subroutine number and MCRO(099) MCRO Required executes that program using the input parameters in S to S+3 and the @MCRO output parameters in D to D+3. MCRO(099) N: Subroutine number S: 1st input...

  • Page 174: Interrupt Control Instructions

    Required Both I/O interrupt tasks and scheduled interrupt tasks are masked (Not supported (disabled) when the PC is first turned on. MSKS(690) can be used to by CS1D CPU unmask or mask I/O interrupts and set the time intervals for Units for Duplex- scheduled interrupts.
  • Page 175 CLEAR Output Clears or retains recorded interrupt inputs for I/O interrupts CLI(691) INTERRUPT Required or sets the time to the first scheduled interrupt for scheduled (Not supported interrupts. by CS1D CPU Units for Duplex- N = 0 to 3 CPU Systems.)

  • Page 176: High-Speed Counter And Pulse Output Instructions (Cj1M-Cpu21/22/23 Only)

    (number of revolutions) or Required VERT converts the counter PV to the total number of revolutions. The result is output to the destination words as 8-digit hexadecimal. Pulses can be PRV2 input from high-speed counter 0 only.
  • Page 177 High-speed Counter and Pulse Output Instructions (CJ1M-CPU21/22/23 Only) Instruction Symbol/Operand Function Location Mnemonic Execution condition Code SET PULSES PULS(886) is used to set the number of pulses for pulse output. Output PULS PULS Required @PULS P: Port specifier T: Pulse type N: Number of...

  • Page 178: Step Instructions

    Symbol/Operand Function Location Mnemonic Execution condition Code STEP DEFINE STEP(008) functions in following 2 ways, depending on its position and Output STEP(008) whether or not a control bit has been specified. STEP Required (1)Starts a specific step. (2)Ends the step programming area (i.e., step execution).
  • Page 179 DIGITAL SWITCH Reads the value set on an external digital switch (or thumbwheel Output INPUT switch) connected to an Input Unit or Output Unit and stores the 4-digit DSW (210) Required or 8-digit BCD data in the specified words. (CS/CJ-series CPU Unit Ver.
  • Page 180 O: Output word D: 1st register word C: System word Inputs up to 64 signals from an 8 × 8 matrix connected to an Input Unit MATRIX INPUT Output MTR (213) and Output Unit (using 8 input points and 8 output points) and stores Required that 64-bit data in the 4 destination words.
  • Page 181 Symbol/Operand Function Location Mnemonic Execution condition Code INTELLIGENT I/O Output Reads the contents of the memory area for the Special I/O Unit READ IORD(222) Required or CPU Bus Unit (see note). IORD @IORD Unit number of Special I/O Unit C: Control data...

  • Page 182: Serial Communications Instructions

    RXD(235) first word from the RS-232C port built into the CPU Unit (no-protocol Required mode) or the serial port of a Serial Communications Board or Unit with @RXD unit version 1.2 or later (no-protocol mode) according to the start code and end code specified for no-protocol mode in the PLC Setup.

  • Page 183: Network Instructions

    Serial Communications Unit with unit NICATIONS UNIT version 1.2 or later. The data is read in no-protocol mode with the start code and end code (if any) specified in the allocated DM Setup Area.
  • Page 184 D: 1st word of received message C: 1st control word EXPLICIT GET Reads status information with an explicit message (Get Attribute Sin- Output EGATR (721) ATTRIBUTE gle, Service Code: 0E hex). Required EGATR (CS/CJ-series CPU Unit Ver. 2.0...

  • Page 185: File Memory Instructions

    Symbol/Operand Function Location Mnemonic Execution condition Code EXPLICIT WORD Reads data to the local CPU Unit from a remote CPU Unit in the net- Output ECHRD (723) READ work. (The remote CPU Unit must support explicit messages.) Required ECHRD (CS/CJ-series CPU Unit Ver.
  • Page 186 Reads ASCII data from I/O memory and stores that data in the Memory Output TWRIT FILE Card as a text file (writing a new file or appending a file). The data is Required stored in the TXT format. TWRIT @TWRIT...

  • Page 187: Display Instructions

    3-25 Display Instructions Instruction Symbol/Operand Function Location Mnemonic Execution condition Code DISPLAY Reads the specified sixteen words of extended ASCII and displays the Output MSG(046) MESSAGE message on a Peripheral Device such as a Programming Console. Required @MSG N: Message number...

  • Page 188: Debugging Instructions

    Symbol/Operand Function Location Mnemonic Execution condition Code TRACE When TRSM(045) is executed, the status of a preselected bit or word Output TRSM(045) MEMORY is sampled and stored in Trace Memory. TRSM(045) can be used any- Not required SAMPLING where in the program, any number of times.

  • Page 189: Failure Diagnosis Instructions

    FPD(269) Required between execution of FPD(269) and execution of a diagnostic output and finding which input is preventing an output from being turned ON. Time monitoring function: Starts timing when execution condition A goes ON. Generates a non-fatal error if output B isn't turned ON within the monitoring time.

  • Page 190: Other Instructions

    Changes the current EM bank. Output EMBC(281) BANK Required EMBC @EMBC N: EM bank number EXTEND Extends the maximum cycle time, but only for the cycle in which this Output MAXIMUM instruction is executed. WDT(094) Required CYCLE TIME @WDT T: Timer setting SAVE CONDI- Saves the status of the condition flags.

  • Page 191: Block Programming Instructions

    IOSP @IOSP ENABLE Enables peripheral servicing that was disabled by IOSP(287) for pro- Output IORS(288) PERIPHERAL gram execution in one of the Parallel Processing Modes or Peripheral Not required SERVICING Servicing Priority Mode. (CS1D CPU Unit for Single-CPUs Systems, CS1-H,...
  • Page 192 Block program n. This block program will now be executed as long as bit "a" is ON. CONDITIONAL EXIT(806) Block program EXIT(806) without an operand bit exits the program if the execution BLOCK EXIT Required condition is ON. EXIT B: Bit operand...
  • Page 193 OFF. (NOT) B: Bit operand IF NOT CONDITIONAL If the ELSE(803) instruction is omitted and the operand bit is ON, the Block program BLOCK instructions between IF(802) and IEND(804) will be executed Required...
  • Page 194 Wait ONE CYCLE AND WAIT(805) If the operand bit is OFF (ON for WAIT NOT(805)), the rest of the Block program WAIT instructions in the block program will be skipped. In the next cycle, Required none of the block program will be executed except for the execution WAIT condition for WAIT(805) or WAIT(805) NOT.
  • Page 195 Execution condition Code COUNTER WAIT CNTW(814) Block program Delays execution of the rest of the block program until the specified count CNTW Required has been achieved. Execution will be continued from the next instruction after CNTW(814)/CNTWX(817) when the counter counts out.
  • Page 196 LEND(810) turns ON. LEND LEND (810) Block program If the operand bit is OFF for LEND(810) (or ON for LEND(810) NOT), LEND Required execution of the loop is repeated starting with the next instruction after LOOP(809). If the operand bit is ON for LEND(810) (or OFF for...

  • Page 197: Text String Processing Instructions

    S1: Text string first word S2: Number of characters D: First destination word GET STRING Output Reads a designated number of characters from the right (end) of a RIGHT RGHT$(653) Required text string. RGHT$ @RGHT$ S1: Text string first word...
  • Page 198 LEN$ Required → @LEN$ S: Text string first word D: 1st destination word REPLACE IN Output Replaces a text string with a designated text string from a designated STRING RPLC$(654) Required position. RPLC$ @RPLC$ → → S1: Text string first word...
  • Page 199 String Compari- Sting comparison instructions (=$, <>$, <$, <=$, >$, >=$) compare two text strings from the beginning, in terms of value of the ASCII codes. If LD: Not required the result of the comparison is true, an ON execution condition is cre-...

  • Page 200: Task Control Instructions

    Task n Task n TASK OFF Output Puts the specified task into standby status. TKOF(821) TKOF Required @TKOF The specified task's task num- The specified task's task num- ber is higher than the local ber is lower than the local task's task number (m<n).

  • Page 201: Model Conversion Instructions (Cpu Unit Ver. 3.0 Or Later Only)

    Bs: Destination base address Of: Offset Can also write to a stack (Stack Push Operation). DATA COLLECT Output Transfers the source word (calculated by adding an offset value to the COLLC(567) COLLC Required base address) to the destination word. @COLLC...

  • Page 202: Special Function Block Instructions

    Outputs the FINS command variable type (data area) code and word Output GETID(286) address for the specified variable or address. This instruction is gener- Required ally used to get the assigned address of a variable in a function block. GETID @GETID S: Variable or address...

  • Page 203: Tasks

    Tasks and Programs ........

  • Page 204: Task Features

    Overview CS/CJ-series control operations can be divided by functions, controlled devices, processes, developers, or any other criteria and each operation can be programmed in a separate unit called a “task.” Using tasks provides the fol- lowing advantages: 1,2,3... 1. Programs can be developed simultaneously by several people.

  • Page 205: Tasks And Programs

    • Interrupt tasks Note 1. Up to 32 cyclic tasks and 256 interrupt tasks for a maximum total of 288 tasks can be created. Each task has its own unique number ranging from 0 to 31 for cyclic tasks and 0 to 255 for interrupt tasks.

  • Page 206: Basic Cpu Unit Operation

    Basic CPU Unit Operation The CPU Unit will execute cyclic tasks (see note) starting at the lowest num- ber. It will also interrupt cyclic task execution to execute an interrupt task if an interrupt occurs. Note The CS1G/H-CPU@@(-V1) and CJ1@-CPU@@ CPU Units do not support this function.
  • Page 207 Section 4-1 Task Features cyclic tasks.” Extra cyclic tasks (interrupt task numbers 0 to 255) are executed starting at the lowest task number after execution of the normal cyclic task (celiac task numbers 0 to 31) has been completed. Note The CS1G/H-CPU@@(-V1) and CJ1@-CPU@@ CPU Units do not support this function.

  • Page 208: Types Of Tasks

    131). The Interrupt Input Unit must be mounted to the CPU Rack. For CJ1- H CPU Units, the Unit must be connected as one of the five Units next to the CPU Unit (slots 0 to 4). For CJ1M CPU Units, the Unit must be connected as...
  • Page 209 Section 4-1 Task Features one of the three Units next to the CPU Unit (slots 0 to 2). I/O Interrupt Units mounted elsewhere cannot be used to request execution of I/O interrupt tasks. I/O interrupts are not supported by CJ1 CPU Units.

  • Page 210: Task Execution Conditions And Settings

    CPU Unit (slots 0 to 4). For CJ1M CPU Units, the Unit must be connected as one of the three Units next to the CPU Unit (slots 0 to 2). I/O Interrupt Units mounted elsewhere cannot be used to request execution of I/O inter- rupt tasks 2.

  • Page 211: Cyclic Task Status

    PROGRAM to RUN or MONITOR mode. This applies only to normal cyclic tasks. Note A Programming Device can be used to set one or more tasks to go to READY status when operation is started for task numbers 0 through 31. The setting, however, is not possible with extra cyclic tasks.

  • Page 212: Status Transitions

    • Running: The task is in READY or RUN status. (There is no way to tell the difference between these.) • Stopped: The task is in INI or WAIT status. (There is no way to tell the dif- ference between these.) Note This function is supported by CX-Programmer version 4.0 or higher.

  • Page 213: Using Tasks

    The TASK ON and TASK OFF instructions can be used only with cyclic tasks and not with interrupt tasks. Note At least one cyclic task must be in READY status in each cycle. If there is not cyclic task in READY status, the Task Error Flag (A29512) will turn ON, and...
  • Page 214 Cyclic task 3 READY status Standby status/Disabled status Tasks and the Execution Cycle A cyclic task (including an extra cyclic task) that is in READY status will main- tain that status in subsequent cycles. READY sta- tus at the Cyclic task 1...
  • Page 215 Cyclic Task Numbers and the Execution Cycle (Including Extra Cyclic Tasks) If task m turns ON task n and m > n, task n will go to READY status the next cycle. Example: If task 5 turns ON task 2, task 2 will go to READY status the next cycle.
  • Page 216 • Other words and bits in I/O Memory are shared by all tasks. CIO 001000 for example is the same bit for both cyclic task 1 and cyclic task 2. There- fore, be very careful in programming any time I/O memory areas other than the IR and DR Areas are used because values changed with one task will be used by other tasks.

  • Page 217: Task Instruction Limitations

    Note These instructions are supported by the CJ1-H-R CPU Units only. The following instructions cannot be used in the power OFF interrupt task (they will not be executed even if they are used and the Error Flag will not turn ON):...

  • Page 218: Flags Related To Tasks

    The following flag work only for normal cyclic tasks. They do not work for extra cyclic tasks. Task Flags A Task Flag is turned ON when a cyclic task in READY status and is turned (TK00 to TK31) OFF when the task is in Disabled (INI) or in Standby (WAIT) status. Task num- bers 00 to 31 correspond to Task Flags TK00 to TK31.
  • Page 219 A299 (leftmost bits of the program address). Examples of Tasks An overall control task that is set to go to READY status at the start of opera- tion is generally used to control READY/Standby status for all other cyclic tasks (including extra cyclic tasks).
  • Page 220 Product B task Developer B task task Product C task Developer C task Tasks Separated by Process Machining task Overall control task Assembly task Conveyor task Combinations of the above classifications are also possible, e.g., classifica- tion by function and process.

  • Page 221: Designing Tasks

    6. A task in READY status will be executed in subsequent cycles as long as the task itself or another task does not shift it to Standby status. Be sure to insert a TKOF(821) (TASK OFF) instruction for other tasks if processing is to be branched between tasks.

  • Page 222: Global Subroutines

    I/O memory used only for individual tasks by task. Relationship of Tasks to Up to 128 block programs can be created in the tasks. This is the total number Block Programs for all tasks. The execution of each entire block program is controlled from the ladder diagram, but the instructions within the block program are written using mnemonics.

  • Page 223: Interrupt Tasks

    Interrupt Tasks 4-3-1 Types of Interrupt Tasks Interrupt tasks can be executed at any time in the cycle if any of the following conditions are in effect. The built-in interrupt inputs and high-speed counter inputs on a CJ1M CPU Unit can be used to activate interrupt tasks. Refer to the CJ Series Built-in I/O Operation Manual for details.
  • Page 224 Section 4-3 Interrupt Tasks Note The execution time for the power OFF task must be less than 10 ms – (Power OFF delay detection time). CPU Unit Interrupt Pro- Power OFF gram External Interrupts (CS An external interrupt task will be executed when an interrupt is requested by an Special I/O Unit, CPU Bus Unit, or Inner Board (CS Series only).
  • Page 225 Section 4-3 Interrupt Tasks next to the CPU Unit (slots 0 to 4). For CJ1M CPU Units, the Unit must be connected as one of the three Units next to the CPU Unit (slots 0 to 2). Units mounted elsewhere cannot be used to generate external interrupts.
  • Page 226 Section 4-3 Interrupt Tasks Note For CS-series PLCs, Interrupt Input Unit numbers are in order from 0 to 1 starting on the left side of the CPU Rack. For CJ-series PLCs, Interrupt Input Unit numbers are in order from 0 to 1 starting from the CPU Unit.
  • Page 227 OFF interrupt task actually executes is the default power OFF detection time (10 to 25 ms for AC power supplies and 2 to 5 ms for DC power supplies) plus the power OFF detection delay time in the PLC...
  • Page 228 OFF detection delay time Note Be sure that the power OFF interrupt task can be executed in less than 10 ms minus the power OFF detection delay time set in the PLC Setup. Any remain- ing instructions will not be executed after this time has elapsed. The power OFF interrupt task will not be executed if power is interrupted during online editing.
  • Page 229 (fixed number) or interrupt notification (reception case number), the Board will request execution of an external interrupt task in the CPU Unit after it receives data from its serial port and writes that data into the CPU Unit’s I/O memory.

  • Page 230: Interrupt Task Priority

    Board requests execution of the interrupt task with that task number. 3. If an external interrupt task (0 to 255) has the same number as a power OFF task (task 1), scheduled interrupt task (task 2 or 3), or I/O interrupt task (100 to 131), the interrupt task will be executed for either interrupt con- dition (external interrupt or the other interrupt condition).

  • Page 231: Interrupt Task Flags And Words

    Section 4-3 Interrupt Tasks Note If you do not want a specific I/O interrupt task number to be saved and exe- cuted for a CS-series CPU Unit when it occurs while another interrupt task is being executed, execute the CLI (CLEAR INTERRUPT) instruction from the other interrupt task to CLEAR the interrupt number saved internally.

  • Page 232: Application Precautions

    Interrupt Task Error will occur. Task Number when The type of task and the current task number when a program stops due to a Program Stopped (A294) program error will be stored in the following locations.
  • Page 233 Spe- cial I/O Unit with an IORF(097), FIORF(225) (CJ1-H-R only) in an interrupt task or if an attempt is made to read/write data for the same Special I/O Unit with an IORD(222) or IOWR(223) instruction. In this case, the IORF(097), FIORF(225) (CJ1-H-R only), IORD(222), or IOWR(223) instruction will not be executed, but the Error Flag will not be turned ON.
  • Page 234 Section 4-3 Interrupt Tasks Note The leftmost bits of A426 (Interrupt Task Error, Task Number) can be used to determine which of the above interrupt task errors occurred. (Bit 15: 10 ms or higher execution error if 0, multiple refresh error if 1)
  • Page 235 (CS Series only). Also turns ON if Interrupt Task Error Detection is enabled for a Special I/O Unit in the PLC Setup, and one of the following conditions occurs for that Special I/O Unit. • There is a conflict between an IORF, FIORF (CJ1-H-R only), IORD,...
  • Page 236 Note Execution of the BIT COUNTER (BCNT), BLOCK SET (BSET), and BLOCK TRANSFER (XFER) instructions will not be interrupted for execution of inter- rupt task, i.e., execution of the instruction will be completed before the inter- rupt task is executed, delaying the response of the interrupt. To prevent this, separate data processing for these instructions into more than one instruc- tions, as shown below for XFER.

  • Page 237: Programming Device Operations For Tasks

    2. Select the General tab, and select the Task Type and Task No. For the cyclic task, click the check box for Operation start to turn it ON.
  • Page 238 Enter 000 to 255. Enter 00 to 31. Write Write Note 1. A Programming Console cannot create new cyclic tasks. 2. The CJ-series CPU Units do not currently support I/O or external interrupt tasks. Only IT001 to IT003 can be specified.

  • Page 239: File Memory Functions

    5-1-1 Types of File Memory........

  • Page 240: File Memory

    Program index files Note 1. Initialize the Memory Card or EM File Memory before using it for the first time. Refer to 5-3 Using File Memory for details on initialization. 2. Refer to 5-2 Manipulating Files for details on installing and removing Mem- ory Cards.
  • Page 241 Number of Files in Root Directory There is a limit to the number of files that can be placed in the root directory of a Memory Card (just as there is a limit for a hard disk). Although the limit depends on the type and format of the Memory Card, it will be between 128 and 512 files.

  • Page 242: Files Stored In File Memory

    Section 5-1 File Memory 3. Insert the Memory Card with the label facing to the right. Do not attempt to insert it in any other orientation. The Memory Card or CPU Unit may be damaged. 4. A few seconds will be required for the CPU Unit to recognize the Memory Card after it is inserted.
  • Page 243 The data file contains the data of one I/O memory data area, in word (16-bit) units. It is possible to store all of the data in the data area or just a specified range of addresses. Any one of the following 6 data areas can be stored: the CIO, Holding, Work, Auxiliary, DM, or EM Area.
  • Page 244 Section Comment 7. Unit/Board Backup File The Unit/Board backup file contains the internal data of a PLC Unit or Board, which is used by the simple backup function. These files are created when the simple backup operation is executed. Internal data is stored for each Unit.
  • Page 245 0 to 9, !, &, $, #, `, {, }, –, ^, (, ), and _ The following characters cannot be used in file names: ,, ., /, ¥, ?, *, “, :, :, <, >, =, +, space, and 2-byte characters.
  • Page 246 (See note 1.) Note 1. Not supported by CS-series CS1 CPU Units that are pre-EV1. 2. File names, represented by “********” above, consist of up to 8 ASCII char- acters. Files Automatically Transferred at Startup This file is automatically transferred from the Memory Card to the CPU Unit when the power is turned ON.
  • Page 247 Section 5-1 File Memory There are two ways to transfer files automatically at Startup: Transferring with a parameter area file and transferring without a parameter area file. Files Used When Transferring with the Parameter File Type Extension Description Explanation File...
  • Page 248 E@_00000.) gram file called REPLACE.OBJ. Note Early versions of the CS/CJ-series CPU Units (CPU Units without a unit ver- sion number) do not support the files shown in the table above, which are transferred in an automatic startup transfer without the parameter file.
  • Page 249 These files are automatically created from the files in either the Memory Card, EM file memory, or comment memory. 2. One example of the CPU Bus Unit settings would be the Data Link Tables. Refer to the operation manuals for specific Units for other setup data.
  • Page 250 Note 1. Data can be transferred to comment memory only when the CX-Program- mer version is version 5.0 or higher and the CPU Unit has a unit version or 3.0 or later. 2. With CX-Programmer version 4.0 or lower, these files cannot be stored in comment memory, even if a CPU Unit with unit version 3.0 or later is being...
  • Page 251 Parameter files (.STD) 16,048 bytes Note Calculate the number of steps in the program file by subtracting the available UM steps from the total UM steps. These values are shown in the CX-Pro- grammer’s Cross-Reference Report. Refer to the CX-Programmer Operation Manual for details.
  • Page 252 DM Area of the CPU Unit without any indication that the area is different. Note Data files with the TXT and CSV format contain hexadecimal (0 to 9, A to F) data that allows the I/O memory numerical data to be exchanged with spread- sheet programs.
  • Page 253 The following illustration shows the data structure of a CSV data file Structure (Single Word) (ABC.CSV) with single-word fields containing four words from I/O memory: 1234 Hex, 5678 Hex, 9ABC Hex, and DEF0 Hex. The structure of the TXT file with single-word fields is the same. 4 bytes...
  • Page 254 For example, if single- word fields are being used input 000A, not just A. • Be sure to input only hexadecimal characters (0 to 9, A to F, or a to f) in the cells. Other characters and codes cannot be used.
  • Page 255 Section 5-1 File Memory Note This part of the DM Area is allocated to Special I/O Units, CPU Bus Units, and Inner Boards. When creating the data files listed above, always specify the first address shown above (D20000, D00000, or E@_00000) and make sure that the size of the file does not exceed the capacity of the specified data area.

  • Page 256: Description Of File Operating Procedures

    File Memory 5-1-3 Description of File Operating Procedures The following table summarizes the 6 methods that can be used to read and write files. Read: Transfers files from file memory to the CPU Unit. Write: Transfers files from the CPU Unit to file memory.

  • Page 257: Applications

    File Memory Section 5-1 3. Data files with the TXT or CSV formats can be read and written only with the FREAD(700) and FWRIT(701) instructions. They cannot be read and written with a Programming Device. 4. Version V1.2 and higher versions of the CX-Programmer can be used to transfer program files (.OBJ) between the computer’s RAM and a storage...
  • Page 258 .OBJ Replace program. Parameter Area Files In this application, the PLC Setup, routing tables, I/O table, and other data for (.STD) particular devices or machines are stored in Memory Cards. The data can be transferred to another device or machine just by switching the Memory Card.

  • Page 259: Manipulating Files

    Manipulating Files Backup Files The backup function can be used to store all of the CPU Unit’s data (the entire I/O memory, program, and parameter area) on the Memory Card without a Programming Device. If a problem develops with the CPU Unit’s data, the backed-up data can be restored immediately.
  • Page 260 A Memory Card can be installed in a computer’s PLC Card slot with the HMC- AP001 Memory Card Adapter (sold separately). Installing a Memory Card in the computer allows the files in the card to be read and written by other pro- grams, such as Windows Explorer.
  • Page 261 1. Double-click the Memory Card icon in the Project Window with the CPU Unit online. The Memory Card Window will be displayed. 2. To transfer from the CPU Unit to file memory, select the program area, I/O memory area, or parameter area in the project work space, select Transfer from the File Memory, and then select transfer to the Memory Card or to EM file memory.
  • Page 262 Precautions when Verification errors may occur at the Programming Console when comparing parameter data between files before transfer and the data after transfer if the Comparing Data after parameter files (.STD) created in one CJ-series CPU Unit are saved to the Transferring Parameter Memory Card in another CJ-series CPU Unit with a different unit version.

  • Page 263: Fins Commands

    Note A computer on an Ethernet Network can read and write file memory (Memory Cards or EM file memory) on a CPU Unit through an Ethernet Unit. Data in files can be exchanged if the host computer functions as an FTP client and the CS/CJ-series PLC functions as an FTP server.

  • Page 264: User Instructions For File Memory Operations

    2215 Hex CREATE/DELETE Creates and deletes subdirectories. SUBDIRECTORY Note The time from the CPU Unit’s internal clock is used to date files created in file memory with the 220A, 220B, 220C, and 2203 commands. 5-2-3 User Instructions for File Memory Operations...
  • Page 265 FILE (See note.) fied I/O memory data area location. Note This instruction can be used in CPU Units with unit version 4.0 or later. Transferring ASCII Files ASCII files can be transferred as well as binary files, so the third and fourth (Not supported by CS- digits of the instruction’s control word operand (C) indicate the type of data file...
  • Page 266 Operation Flag as C. Note The time from the CPU Unit’s internal clock is used to date files created in file memory with FWRIT(701). Only one file memory operation may be executed at a time, so FREAD(700) and FWRIT(701) must not be executed when any of the following file memory operations are being performed: 1,2,3...
  • Page 267 2. Set the destination unit address to 00 (PLC’s CPU Unit) and the destination node to 00 (within local node) in C+3. 3. Set the number of retries to 0 in C+4. (The number of retries setting is in- valid, so set it to 0.) Refer to 5-2-2 FINS Commands for information on FINS commands.
  • Page 268 Response requested, communications port 7, 0 retries Response monitor time: FFFF Hex (6,553.5 s) Note There are other FINS commands that can be sent to the local PLC in addition to the ones related to file memory operations that are listed in the table above.

  • Page 269: Replacement Of The Entire Program During Operation

    ON the Replacement Start Bit (A65015). The specified file will be read from the Memory Card and it will replace that program will replace the executable program at the end of the current cycle. The replacement Pro-...
  • Page 270 Note 1. Turn ON the IOM Hold Bit (A50012) if you want to maintain the status of I/O memory data through the program replacement. Turn ON the Forced Status Hold Bit (A50013) if you want to maintain the status of force-set and force-reset bits through the program replacement.
  • Page 271 The status of the cyclic tasks depends upon their operation-start properties. Program Replacement (Their status is the same as it would be if the PLC were switched from PRO- GRAM to RUN/MONITOR mode.) The First Cycle Flag (A20011) will be ON for one cycle after program execu- tion resumes.
  • Page 272 A5A5 Hex, program replacement will start when this bit is turned from pre-EV1 CS1 CPU Units) OFF to ON. Do not turn this bit from OFF to ON again during program replacement. This bit is automatically turned OFF when program replacement is com- pleted (normally or with an error) or the power is turned ON.
  • Page 273 Section 5-2 Manipulating Files Start and execute another task to perform any processing required before pro- gram replacement or IOM Hold Bit processing. Main Task (Cyclic task number 0) First Cycle Flag ← Program version ← Version storage area Execution...
  • Page 274 (AUTOEXEC.OBJ or REPLACE.OBJ (see note)) in a Mem- ory Card. When the PLC is turned ON, the automatic transfer at startup file is read and that program is replaced later with a program file for a different device.

  • Page 275: Automatic Transfer At Startup

    Automatic Transfer at Startup Automatic transfer at startup is used to read the user program, parameters, and I/O memory data from a Memory Card to the CPU Unit when the power is turned ON. The following files can be read automatically to CPU Unit memory.
  • Page 276 4. If DIP switch pin 7 is turned ON and pin 8 is turned OFF to use the simple backup function, the simple backup function will take precedence even if pin 2 is also ON.
  • Page 277 DM Area or EM bank. 3. If DIP switch pin 7 is turned ON and pin 8 is turned OFF to use the simple backup function, the simple backup function will take precedence even if pin 2 is also ON.
  • Page 278 Section 5-2 Manipulating Files Supported File Transfer The following tables list whether files are automatically transferred to the CPU Combinations Unit at startup depending on which files are present on the Memory Card. ■ Program File: AUTOEXEC.OBJ Program file Parameter area...
  • Page 279 1,2,3... 1. Turn OFF the PLC power supply. 2. Turn ON DIP switch pin 2 on the front panel of the CPU Unit. Be sure that pins 7 is OFF. Note The simple backup function will take precedence over the automat- ic transfer at startup function, so be sure that pins 7 is OFF.
  • Page 280 Memory Card when the power was turned on (automatic transfer at start-up). The CPU Unit will stop and the ERR/ALM indicator on the front of the CPU Unit will light. Note: A40309 will be turned ON if the error occurred during automatic trans- fer at startup.

  • Page 281: Simple Backup Function

    Restoring Data from the Memory Card to the CPU Unit To restore the backup files to the CPU Unit, check that pin 7 is ON and turn the PLC’s power OFF and then ON again. The backup files containing the...
  • Page 282 CPU Unit when the PLC is turned ON even if pin 2 of the DIP switch is ON. 2. Data will not be read from the Memory Card to the CPU Unit if pin 1 of the DIP switch is ON (write-protecting program memory).
  • Page 283 Pin 7: OFF Note 1. Refer to Verifying Backup Operations with Indicators on page 246 for de- tails on the results of read, write, and compare operations. 2. Refer to 5-3-2 Operating Procedures for guidelines on the time required for...
  • Page 284 Unit will be left unchanged if the number of banks backed up is less than the number of banks in the CPU Unit. If a BACKUPE@.IOM file is missing (for example: 0, 1, 2, 4, 5, 6), only the consecutive files will be read. In this case, data would be read to banks 0, 1, and 2 only.
  • Page 285 Special I/O Units: Unit number + 20 Hex Inner Board: E1 Hex 2. An error will not occur in the CPU Unit even if this file is missing when data is transferred from the Memory Card to I/O memory, but an error will occur in the Unit or Board if the data is not restored.
  • Page 286 Section 5-2 Manipulating Files Symbol Tables, Comment Files, Program Index Files (CS1-H/CJ1-H, CJ1M, CS1D CPU Units with Unit Version 3.0 or Later Only) File name and Contents Backup from Restore from Comparing Files required extension CPU Unit to Memory Card...
  • Page 287 Note 1. When the backup operation is completed normally, power to the Memory Card will go OFF when the MCPWR indicator goes OFF. If the Memory Card will be used again, press the Memory Card Power Switch to supply power and execute the desired operation.
  • Page 288 Auxiliary Area words and flags. Backing Up Board and Unit Data to Memory Cards The following data in the CPU Unit is backed up by the simple backup opera- tion: the user program, parameter area, and all of the data areas in I/O mem- ory.
  • Page 289 Read Compare Application This function can be used to back up data for the entire PLC, including the CPU Unit, DeviceNet Units, Serial Communications Units/Boards, etc. It can also be used for Unit replacement. Unit/Board Backup Files The data from each Unit and Board is stored in the Memory Card using the following file names: BACKUP@@.PRM.
  • Page 290 CS1W-LCB05 • Block connection data Note Data from the Units and Boards listed above will be automatically backed up for the simple backup operation. There is no setting available to include or exclude them. If a Programming Console is used, however, operations are supported individually for the user program area, parameter area, and I/O memory areas.
  • Page 291 Section 5-2 Manipulating Files The backup data for the Units and Boards will be created in a file and stored in the Memory Card with the other backup data. Memory Card power supply switch DeviceNet Unit or other CPU Unit...
  • Page 292 When data is backed up from specific Units/Boards, a communications port will be searched for beginning from port 0 and the first available port will be used. If the port number is the same as one used by a network communications instruction, the network communications instruction will not be executed until the simple backup operation has been completed.

  • Page 293: Using File Memory

    Section 5-3 Using File Memory Precautions When When using a CJ-series CPU Unit with unit version 2.0 or earlier with a CJ- Mismatch Occurs During series CPU Unit with unit version 3.0, verification errors may occur when com- paring parameter data with the backup data restored from the simple backup Backup Comparison file that was created.
  • Page 294 Initialize EM file memory. CX-Programmer Programming Console Initializing Individual EM A specified EM bank can be converted from ordinary EM to file memory. File Memory Note The maximum bank number for CJ-series CPU Units is 6. Bank 0 Bank 0 1.

  • Page 295: Operating Procedures

    Section 5-3 Using File Memory The following table shows the corresponding settings when using a Program- ming Console. Programming Name Description Initial setting Console address +136 EM File Memory 0000 Hex: None 0000 Hex Starting Bank 0080 Hex: Starting at bank No. 0 008C hex: Bank No.
  • Page 296 4. Turn ON DIP switch pin 2 (automatic transfer at startup). DIP switch pin 2 ON Note If pin 7 is ON, the backup function will be enabled and will override the automatic transfer at startup function. Turn OFF pins 7 and 8 for automatic transfer at startup.
  • Page 297 I/O memory files (REPLACE.IOM, REPLCDM.IOM, and/or RE- PLCDE@.IOM). Note A parameter area will not be transferred even if one is on the Memory Card. 3. Turn OFF the PLC power supply. 4. Turn ON DIP switch pin 2 (automatic transfer at startup).
  • Page 298 1,2,3... 1. Insert a Memory Card into the CPU Unit. (Already initialized.) 2. Write the Program Password (A5A5 Hex) in A651 and the Program File Name in A654 to A657. 3. Turn the Replacement Start Bit (A65015) from OFF to ON.
  • Page 299 4. Select either Symbols or Comments as the data to transfer. Note If a Memory Card is installed in the CPU Unit, data can be transferred only with the Memory Card. (It will not be possible with EM file memory.)

  • Page 300: Power Interruptions While Accessing File Memory

    (A39507 for the Memory Card, A39506 for EM file memory) will be turned ON. The flag will be turned OFF the next time that the power is turned OFF. When a file is deleted, a deletion log file (DEL_FILE.IOM) will be created in the root directory of the Memory Card or EM file memory.

  • Page 301: Advanced Functions

    High-speed Inputs........
  • Page 302 Program Protection ........

  • Page 303: Cycle Time/High-Speed Processing

    Note Indicates the cycle time for program execution when using a parallel processing mode. The minimum cycle time (1 to 32,000 ms) is specified in the PLC Setup in1- ms units. Minimum cycle time Minimum cycle time...

  • Page 304: Maximum Cycle Time (Watch Cycle Time)

    Maximum Cycle Time (Watch Cycle Time) If the cycle time (see note) exceeds the maximum cycle time setting, the Cycle Time Too Long Flag (A40108) will be turned ON and PLC operation will be stopped. Note Indicates the cycle time for program execution when using parallel processing mode.

  • Page 305: Cycle Time Monitoring

    CS1W-IDP01 High-speed Input Unit or use the high-speed inputs of the C200H-ID501/ID215 and C200H-MD501/MD115/MD215 High-density I/O Units. The high-speed inputs can receive pulses with a pulse width (ON time) of 1 ms or 4 ms for the C200H High-density Input Units and 0.1 ms for the CS1W-IDP01 High-speed Input Unit.

  • Page 306: Interrupt Functions

    Special I/O Unit, CPU Bus Unit, or Inner Board. Note The built-in interrupt inputs and high-speed counter inputs on a CJ1M CPU Unit can be used to activate interrupt tasks. Refer to the CJ Series Built-in I/O Operation Manual for details.
  • Page 307 2. Immediate Refreshing Using the Instruction's Immediate Refresh Variation When an address in the I/O Area is specified as an operand in the immediate- refreshing variation of an instruction, that operand data will be refreshed when the instruction is executed. Immediate-refreshing instructions can refresh data allocated to Basic I/O Units.
  • Page 308 0016 When a high-speed response is needed from a calculation that uses input data from a Basic I/O Unit or outputs data to a Basic I/O Unit, use IORF(097) just before and just after the calculation instruction. Note IORF(097) has a relatively long instruction execution time and that execution time increases proportionally with the number of words being refreshed, so it can significantly increase the cycle time.
  • Page 309 • Words allocated to the Unit in the DM Area • Data specific to the Unit (See note.) Note Data specific to a CPU Bus Unit would include data links for Control- ler Link Unit or SYSMAC LINK Units, as well as remote I/O for De- viceNet Units.
  • Page 310 Ten words in the Special I/O Unit Area (CIO 2000 to CIO 2959) are allocated to each Special I/O Unit based on the unit number set on the front of the Unit. Data is refreshed between this area and the CPU Unit each cycle during I/O refreshing, after all of the instructions in the executable tasks have been exe- cuted.
  • Page 311 This function is supported only by CS1-H, CJ1-H, CJ1M, or CS1D CPU Units. Normally, data links and other special data for CPU Bus Units are refreshed along with the CIO and DM Area words allocated to the Units during the I/O refresh period following program execution.
  • Page 312 1. The input arrives in the PLC (CPU Unit #1) just after I/O refreshing, caus- ing a delay of one cycle before the input is read into the PLC. CPU Bus Units are refreshed after program execution, causing a total delay of two cycle times.
  • Page 313 1. The input arrives in the PLC (CPU Unit #1) just after I/O refreshing, caus- ing a delay of one cycle before the input is read into the PLC. CPU Bus Units are refreshed during program execution, reducing the total delay to approximately 1.5 cycle times.

  • Page 314: Background Execution

    Background execution can be used for large quantities of data processing, such as data compilation or processing, that is required only at special times (e.g., once a day) when reducing the effect on the cycle time is more impor- tant than the speed of the data processing.
  • Page 315 5. Background execution will be continued over several cycles. 6. When processing has been completed, the Communications Port Enabled Flag for that port will be turned ON. This will enable another instruction to be executed in the background. Applicable Instructions Background processing will not be performed for the following instructions when they are used in function blocks.
  • Page 316 Section 6-1 Cycle Time/High-speed Processing the address will not be output to the index register and will be output to A595 and A596 instead. To store the address in an index register, use a Data Move instruction (e.g., MOVL(498)) to copy the address in A595 and A596 to an index register.
  • Page 317 Section 6-1 Cycle Time/High-speed Processing The following table shows the corresponding settings when using a Program- ming Console. Word Bits Name Setting Default and update timing +198 15 Table Data Instruc- 0: Not processed in back- 0: Not pro- tion Background Exe-...
  • Page 318 Use the Communications Port Enabled Flags to be sure that only one instruction is executed on each port at any one time. Note If an instruction is specified for execution in the background for a port for which the Communications Port Enabled Flag is OFF, the ER Flag will turn ON and the background instruction will not be executed.
  • Page 319 With background execution, the program is changed so that MAX(182) is exe- cuted only when the specified Communications Port Enabled Flag is ON (i.e., only when the port is not already being used for background execution or net- work communications). Also, input conditions are controlled with SET and RESET instructions to ensure that processing is performed in the correct order.
  • Page 320 MAX(182), MIN(183), and SRCH(181). ■ Traditional Programming without Background Execution As shown below, the actual memory map address of the word containing the maximum value is output to an index register. Execution condition MAX(182) is executed completely as soon as the execution condition “a”...

  • Page 321: Sharing Index And Data Registers Between Tasks

    MOV(021) is used to check whether the minimum value found by MIN(183) is 0, because the Equals Flag in MOV(021) (Equals Flag = ON when the source data in S is 0) operates in the same way as in MIN(183) (Equals Flag = ON when the minimum value is 0).
  • Page 322 1. Shared Index and Data Registers can be used to eliminate the need to store and load register contents between tasks when the same contents is needed in two or more tasks. Refer to the section on index registers in the CS Series Operation Manual (W339) or the CJ Series Operation Manual (W393) for information on storing and loading index register contents.

  • Page 323: Index Registers

    Index Register as an operand in other instructions to indirectly address the stored PLC memory address. The advantage of Index Registers is that they can specify any bit or word in I/O memory, including timer and counter PVs.
  • Page 324 Instruction A m+n Example 2 The data in D00000 to D00099 (augend data) is added to the data in D00100 to D00199 (addend data) and the addition results are output to D00200 to D00299. The operands of a single addition instruction are specified by index registers and the addition operations are performed by incrementing the index registers and repeatedly executing the addition instruction.
  • Page 325 NEXT Jump destination when execution condition "a" is not upwardly &1000 differentiated (OFF→ON). Direct Addressing of Index Registers Index Registers can be directly addressed only in the instructions shown in the following table. Instruction group Instruction name Mnemonic Primary function...

  • Page 326: Processing Related To Index Registers

    (FIFO) or last-in first-out (LIFO) basis. A particular region of I/O memory must be defined as a stack. The first words of the stack indicate the length of the stack and contain the stack pointer. The stack pointer is incremented each time that data is written to the stack to indi- cate the next address where data should be stored.
  • Page 327 Note Actually, the first two words of the stack contain the PLC memory address of the last word in the stack and the next word contains the stack pointer. FIFO (First-in First-out) Processing The following diagram shows the operation of a first-in first-out (FIFO) stack.
  • Page 328 D00101. Example 2: This example defines a stack from D00000 to D00014 (which can store 10 words of data), finds the words in the stack that match a specified value, and deletes all of the matching words.
  • Page 329 The PLC memory address of the result word (word containing the max. value, min. value, search data, etc.) is automatically stored in IR0. The Index Regis- ter (IR0) can be used as an operand in later instructions such as MOV(021) to read the contents of the word or perform other processing.
  • Page 330 Note Record numbers and word addresses are related through the Index Regis- ters. Specify a record number in SETR(635) to store the PLC memory address of the beginning of that record in an Index Register. When data is required from the record, add the required offset to that Index Register to access any word in the record.
  • Page 331 Example The following example uses Index Registers and the record-table instructions to compare three values to words 1, 3, and 5 in each record. If a match is found, the record number is stored in D00000. DIM(631) defines a record table with 1,000 records of 5 words each.
  • Page 332 &1000 Increments IR0 by five with each repetition and compares the first, third, and fifth words in each record to the comparison data. Writes the record number to D00000 and breaks the loop if matching data is found.

  • Page 333: Serial Communications

    Section 6-3 Serial Communications Serial Communications The CS/CJ-series CPU Units support the following serial communications functions. Host link communications and no-protocol communications are described in detail later in this section. Protocol Connections Description Ports Peripheral RS-232C Host link 1) Various control commands such...
  • Page 334 Polled Unit Here, we will describe Host Link and No-protocol communications. Note The CJ1W-CIF11 is not insulated and the total transmission distance is 50 meters max. If the total transmission distance is greater than 50 meters, use the insulated NT-AL001 and do not use the CJ1W-CIF11. If only the NT-AL001...

  • Page 335: Host Link Communications

    Communicate with the host computer through other PLCs in the network. (Convert from host link to network protocol.) SEND/RECV/ CMND Command Note 1. The FINS command must have a host link header and terminator attached before it is transmitted from the host computer.
  • Page 336 Section 6-3 Serial Communications 2. The FINS command is transmitted from the PLC with a host link header and terminator attached. A program must be prepared in the host comput- er to analyze the FINS commands and return the proper responses.
  • Page 337 Writes the specified data (word units only) to the EM Area, starting from the specified word. SV READ 1 Reads the 4-digit BCD constant or word address in the SV of the spec- ified timer/counter instruction. SV READ 2 Searches for the specified timer/counter instruction beginning at the specified program address and reads the 4-digit constant or word address in the SV.
  • Page 338 INITIALIZE (command only) Initializes the transmission control procedure of all PLCs connected to the host computer. Undefined command This response is returned if the header code of a command was not (response only) recognized. FINS Commands The following table lists the FINS commands. Refer to the FINS Commands Reference Manual (W227) for more details.
  • Page 339 PLCs to the CPU Unit. Observe the following points when transmitting FINS commands through the network. • CPU Bus Units (such as Controller Link Units or Ethernet Units) must be mounted in the local PLC and destination PLC to transmit FINS com- mands.

  • Page 340: No-Protocol Communications

    256 bytes RXDU(255) in the pro- (External device → PLC) gram Note This function is supported by CPU Units with unit version 3.0 or later or Serial Communications Units/Boards with unit version 1.2 or later. Procedure ● Using the CX-Programmer Set the PLC Setup from a Programming Refer to the CX-Programmer Operation Manual.

  • Page 341: Nt Link (1:N Mode)

    (data: 254 bytes max.) (data: 253 bytes max.) • When more than one start code is used, the first start code will be effec- tive. • When more than one end code is used, the first end code will be effective.

  • Page 342: Cpu Unit's Serial Gateway

    PLC Setup When making settings with the CX-Programmer, set the baud rate to 115,200 bps for a high-speed NT Link or 38,400 bps for a standard NT Link. The following table shows the corresponding settings when using a Program- ming Console.
  • Page 343 (enabled in Serial Gateway mode or pro- tocol macro mode). Default: 5 s; Setting range: 0.1 to 25.5 s Note If a timeout occurs, the FINS end code is returned to the source of the FINS command (0205 hex: Response tim- eout).
  • Page 344 RS-485 (CompoWay/F) CompoWay/F-compatible OMRON component Note When the NS-series PT is connected serially to the PLC using serial communications mode (1:N NT Links), and the NS-series PT sends FINS commands encapsulated in NT Link commands using Smart Active Parts, the CPU Unit removes the NT Link header, etc.
  • Page 345 2. The contents of the CompoWay/F command enclosed in the FINS mes- sage that is sent is as follows: Node number + subaddress + SID + command text (ASCII must be used.) STX, ETX+BCC are not required when sending FINS. They are added au- tomatically for serial communications.
  • Page 346 Example: If the CompoWay/F command MRC SRC is “01” “02” (where the quotation marks (“”) indicate ASCII characters), 0, 1, 0, 2 must be treated as ASCII characters. Therefore, set “01” as 3031 hex (not 01 hex), and “02” as 3032 hex (not 02 hex).

  • Page 347: Serial Plc Links (Cj1M Cpu Units Only)

    0.1 and 25.5 s.) If a response is not received at the serial port within the set time, a FINS error response is returned to the source of the FINS command (end code: 0205 hex (response timeout)).
  • Page 348 Example: Complete link method, highest unit number: 3. In the following diagram, Polled Unit No. 2 is either a PT or is a Unit not present in the network, so the area allocated for Polled Unit No. 2 is undefined in all nodes.
  • Page 349 Polling Unit only. Example: Polling Unit link method, highest unit number: 3. In the following diagram, Polled Unit No. 2 is a PT or a Unit not participating in the network, so the corresponding area in the Polling Unit is undefined.
  • Page 350 1. Set the serial communications mode of the RS-232C communications port to Serial PLC Links (Polling Unit). 2. Set the link method to the Complete Link Method or Polling Unit Link Meth- 3. Set the number of link words (up to 10 words for each Unit).
  • Page 351 03 to 00 0 to 7 hex 0 hex Note Automatically allocates 10 words (A hex) when the default setting of 0 hex is used. Settings at the Polled Unit When using a high-speed serial PLC Link, select the Custom Option in the...
  • Page 352 Section 6-3 Serial Communications When using a standard serial PLC Link, select the Standard Option in the Communications Settings Area. The following table shows the corresponding settings when using a Program- ming Console. Item Programming Console Set value Default Refresh timing...

  • Page 353: Changing The Timer/Counter Pv Refresh Mode

    • Turns OFF again when the changes to settings are completed. Note In the same way as for the NT Link (1:N), the status (communicating/not com- municating) of PTs in the Serial PLC Link can be checked from the Polling Unit (CPU Unit) by reading the RS-232C Port Communicating with PT Flag (A393 bits 00 to 07 for unit numbers 0 to 7).

  • Page 354: Functional Specifications

    Checking the CPU Unit Lot Number 1,2,3... 1. The lot number is printed on the bottom of the front panel (CS Series) or the right corner of the top of the Unit (CJ Series), and is comprised of the last two digits of the year, the month, and the day, in that order, as shown in the following diagram.

  • Page 355: Bcd Mode/Binary Mode Selection And Confirmation

    I/O Table Window, and selecting Unit Information - CPU Unit. The lot No. will be displayed in the same format as shown in the above di- agram, i.e., comprised of the last two digits of the year, the month, and the day, in that order.
  • Page 356 Example: The timer/counter operation mode is different, so TIM cannot be used. BCD Mode/ Binary Mode Confirmation A09915 in the Auxiliary Area (Timer/Counter PV Refresh Mode Flag) can be used to check whether a CPU Unit is operating in BCD mode or binary mode. Name Address Details...

  • Page 357: Bcd Mode/Binary Mode Mnemonics And Data

    # or & indicating the constant, (e.g., TIM 0000 0010), the timer/counter set value will be input as an address (e.g., the value in CIO word 0010 will be used as the set value). 6-4-5 Restrictions •...
  • Page 358 • CX-Programmer: An error will occur if an instruction is input for a different mode than that set as the timer/counter PV refresh mode under PLC properties. Example: When the PLC in the project is set to binary mode, an error will occur if TIM is input as the mnemonic.

  • Page 359: Instructions And Operands

    Instruction name BCD mode Binary mode Mnemonic TMHH TMHHX #0000 to #9999 (BCD) S (timer set value) &0 to &65535 (decimal) or #0000 to #FFFF (hexa- decimal) Setting time (unit: 0.001 s) 0 to 9.999 s 0 to 65.535 s...
  • Page 360 #0000 to #9999 (BCD) S (timer set value) &0 to &65535 (decimal) or #0000 to #FFFF (hexa- decimal) Setting time (unit: 0.0001 s) 0 to 0.9999 s 0 to 6.5535 s HUNDREDTH-MS TIMER (CJ1-H-R CPU Units Only) Instruction name BCD mode...

  • Page 361: Using A Scheduled Interrupt As A High-Precision Timer (Cj1-H-R And Cj1M Only)

    These functions allow applications such as that shown in the following exam- ple of a high-precision one-shot timer, where the input bit turning ON acts as a trigger, causing the output bit to turn ON, and then turn OFF again after a...

  • Page 362: Setting The Scheduled Interrupt To Units Of 0.1 Ms

    1,2,3... 1. Input interrupt task starts when the built-in input bit turns ON. 2. Output bit A turns ON in the input interrupt task, and the MSKS(690) in- struction is executed to perform a scheduled interrupt reset start. 3. After a fixed interval, the scheduled interrupt task starts, and output bit A in the scheduled interrupt task turns OFF, and the MSKS(690) instruction is executed to prohibit a scheduled interrupt.

  • Page 363: Startup Settings And Maintenance

    (this is called a reset start). This method can be used to specify the time to the first interrupt without using the CLI(691) instruction. Scheduled interrupts are started by using the MSKS(690) instruction to set the scheduled interrupt time (interval between two interrupts).

  • Page 364: Hot Start/Hot Stop Functions

    PLC Power ON In order for all data* in I/O memory to be retained when the PLC is turned on (OFF → ON), the IOM Hold Bit must be ON and it must be protected in the PLC Setup (address 80, IOM Hold Bit Status at Startup).

  • Page 365: Startup Mode Setting

    1: The IOM Hold Bit is retained when power is turned on. 6-6-2 Startup Mode Setting The CPU Unit’s initial operating mode (when the power is turned on) can be set in the PLC Setup. Operating mode Power ON PLC Setup...

  • Page 366: Run Output

    Some of the Power Supply Units (the C200HW-PA204R, C200HW-PA209R, CJ1W-PA205R, and CS1D-PA207R) are equipped with a RUN output. This output point is ON (closed) when the CPU Unit is operating in RUN or MONI- TOR mode and OFF (open) when the CPU Unit is in PROGRAM mode.

  • Page 367: Power Off Detection Delay Setting

    PLC Setup (address 225 bits 0 to 7, Power OFF Detection Delay Time) that can extend this time by up to 10 ms (up to 2 ms for DC power supplies). When the power OFF interrupt task is enabled, it will be executed when the power interruption is confirmed, otherwise the CPU will be reset and operation will be stopped.

  • Page 368: Clock Functions

    Note The CS1G/H-CPU@@ (-V1) and CJ1@-CPU@@ CPU Units do not support this function. Procedure 1,2,3... 1. Set the Disable Setting for Power OFF Interrupts in A530 to A5A5 Hex to enable disabling Power OFF Interrupts. 2. Enable disabling Power OFF Interrupts in the PLC Setup (this is the default setting).
  • Page 369 1. Supported only in CPU Units with unit version 3.0 or later. 2. The day, hour, minute, and seconds data in Power ON Clock Data 1 (A720 to A722) is the same as the time data in the Startup Time words (A510 to A511).

  • Page 370: Program Protection

    Write-protection Using the DIP Switch The user program can be write-protected by turning ON pin 1 of the CPU Unit’s DIP switch. When this pin is ON, it won’t be possible to change the user program from a Programming Device (including Programming Consoles). This function can prevent the program from being overwritten inadvertently at the work site.
  • Page 371 Settings Dialog Box and input the password. c) Transfer the program. Note For CS/CJ-series CPU Units Ver. 2.0 or later, read-protection can be set not only for the entire program, but also for specific tasks. For details, refer to...

  • Page 372: Write-Protection From Fins Commands Sent To Cpu Units Via Networks

    Write-protection from FINS Commands Sent to CPU Units via Networks For CS/CJ-series CPU Units Ver. 2.0 or later, protection can be set to prevent writing to and otherwise controlling CPU Units by using FINS commands via networks (i.e., connections other than direct serial connections). This includes writing from applications using FinsGateway as well as from the CX-Program- mer, CX-Protocol, and CX-Process.

  • Page 373: Remote Programming And Monitoring

    For details, refer to 1-4-3 Write-protection from FINS Commands Sent to CPU Units via Networks in the CS Series PLC Operation Manual or the CJ Series PLC Operation Manual. 6-6-9...

  • Page 374: Unit Profiles

    CX-Programmer, writing data from a Programming Con- sole, online editing, data transfers from a Memory Card or EM file memory, etc. • The user program and parameter data written to flash memory is auto- matically transferred to user memory in the CPU Unit at startup.
  • Page 375 1. The CS1G/H-CPU@@ (-V1) and CJ1@-CPU@@ CPU Units do not support this function. 2. The BKUP indicator on the front of the CPU Unit will light while data is be- ing written to flash memory. Do not turn OFF the power supply to the CPU Unit until the backup operation has been completed (i.e., until the BKUP...

  • Page 376: Startup Condition Settings

    Some Units and Inner Boards require extensive time to start up after the power supply is turned ON, affecting the startup time of the CPU Unit. The PLC Setup can be set so that the CPU Unit will start without waiting for these Units to be initialized.

  • Page 377: Diagnostic Functions

    Units and Boards have completed startup processing. Startup Condition 0: If there is one or more of the specific Boards or Units that has not com- pleted startup processing, the CPU Unit will go on standby in MONITOR or PROGRAM mode and wait for all Units and Boards.

  • Page 378: Output Off Function

    FAL(006) generates a non-fatal error and FALS(007) generates a fatal error that stops program execution. When more than 20 errors occur, the oldest error data (in A100 to A104) is deleted, the remaining 19 records are shifted down by one record, and the newest record is stored in A195 to A199.

  • Page 379: Failure Alarm Functions

    When the master function is used with the CS1W-DRM21 or CJ1W-DRM21, DeviceNet all slave outputs will be turned OFF. When the slave function is used, all inputs to the master will be OFF. When the C200HW-DRM21-V1 is used, however, slave outputs will not be turned OFF.
  • Page 380 OFF and outputs that bit’s address. The output can be set to bit address output (PLC memory address) or message output (ASCII). • If bit address output is selected, the PLC memory address of the bit can be transferred to an Index Register and the Index Register can be indi- rectly addressed in later processing.

  • Page 381: Simulating System Errors

    1,2,3... 1. Set the FAL or FALS number to use for simulation in A529. (A529 is used when simulating errors for FAL(006) and FALS(007). 2. Set the FAL or FALS number to use for simulation as the first operand of FAL(006) or FALS(007).

  • Page 382: Disabling Error Log Storage Of User-Defined Fal Errors

    (every FAL errors in error log. cycle) Note The following items will be stored in the error log even if the above setting is used to prevent user-defined FAL errors from being recorded. • User-defined fatal errors (FALS(007)) • Non-fatal system errors •...

  • Page 383: Cpu Processing Modes

    Normally, peripheral servicing (see note) is performed once at the end of each cycle (following I/O refresh) either for 4% of the cycle or a user-set time for each service. This makes it impossible to service peripheral devices at a rate faster than the cycle time, and the cycle time is increased by the time required for peripheral servicing.
  • Page 384 In this mode, I/O memory access for peripheral servicing is not executed in parallel with program execution, but rather is executed following program exe- cution, just like it is in the normal execution mode, i.e., following the I/O refresh period. All other peripheral servicing is executed in parallel with program exe- cution.
  • Page 385 This time is stored in A266 and A267 in normal execution mode. As a guideline, if the instruction execution time is 2 ms or less, a peripheral servicing cycle time over error will oc- cur and the parallel processing mode cannot be used. When debug-...
  • Page 386 Section 6-8 CPU Processing Modes The following table shows the corresponding settings when using a Program- ming Console. Program- Name Setting Default CPU Unit ming refresh Console timing address Word +219 08 to CPU Pro- 00 Hex: Normal Mode 00 Hex:...
  • Page 387 (internal logic ports) that are being used (including background execution) Note Event servicing to access I/O memory includes 1) Servicing any received FINS commands that access I/O memory (I/O memory read/write commands with common codes beginning with 01 Hex or forced set/reset commands with...

  • Page 388: Peripheral Servicing Priority Mode

    (CS Series only), CPU Bus Units, and Special I/O Units is normally serviced only once at the end of the cycle after the I/O refresh. Either 4% of the cycle time or a user-set time is allocated to each service. A mode, however, is avail- able that enables periodic servicing within a cycle.

  • Page 389: Peripheral Servicing Priority Mode

    It is possible, however, that the same Unit or port will be serviced more than once dur- ing the same cycle. • Unit or ports are serviced in the order in which they are detected by the CPU Unit. Note 1.
  • Page 390 Section 6-9 Peripheral Servicing Priority Mode PLC Setup Settings The following settings must be made in the PLC Setup to use the Peripheral Servicing Priority Mode. • Slice Time for Program Execution: 5 to 255 ms in 1-ms increments • Slice Time for Peripheral Servicing: 0.1 to 25.5 ms in 0.1-ms increments •...

  • Page 391: Temporarily Disabling Priority Mode Servicing

    Any other Normal operation Generated Note If an error is detected in the PLC Setup, A40210 will turn ON and a non-fatal error will occur. Auxiliary Area Information If the slice times are set for program execution and peripheral servicing, the total of all the program execution and peripheral servicing slice times will be stored in A266 and A267.
  • Page 392 2. Disabling interrupts with DI(693) or IOSP(287) is effective until EI(694) or IORS(288) is executed, until END(001) is executed, or until PLC operation is stopped. Program sections can thus not be created that go past the end of a task or cycle. Use DI(693) and EI(694) or IOSP(287) and IORS(288) in each cyclic task when necessary to disable interrupts in more than one cycle or task.

  • Page 393: Battery-Free Operation

    • Whether or not I/O memory (e.g., CIO Area) is maintained or not • Whether or not the DM and EM Areas are initialized at startup • Whether or not the DM and EM Areas are initialized from the user pro- gram The above differences are summarized in the following table.
  • Page 394 • The current EM bank will always be 0 at startup. • There will be no files left in the EM file memory at startup and the file memory functions cannot be used. The EM file memory must be reset...
  • Page 395 Section 6-10 Battery-free Operation Procedure The following flowcharts show the procedures for the two types of CPU Unit. CS1-H, CJ1-H, CJ1M, or CS1D CPU Units Power ON Operation with a Battery Use normal operation. No Memory Card is required. Maintain...

  • Page 396: Other Functions

    6-11 Other Functions 6-11-1 I/O Response Time Settings The input response times for CS/CJ Basic I/O Units can be set by Rack and Slot number. Increasing the input response time reduces the effects of chat- tering and noise. Decreasing the input response time (but keeping the pulse width longer than the cycle time) allows reception of shorter input pulses.

  • Page 397: I/O Area Allocation

    The following table shows the corresponding settings when using a Program- ming Console. The input response times for the 80 slots in a CS/CJ PLC (Rack 0 Slot 0 through Rack 7 slot 9) can be set in the 80 bytes in addresses 10 through 49. Programming Name...
  • Page 398 Section 6-11 Other Functions...

  • Page 399: Program Transfer, Trial Operation, And Debugging

    Program Transfer..........Trial Operation and Debugging........

  • Page 400: Program Transfer

    • Automatic transfer when the power is turned ON When the power is turned ON, the AUTOEXEC.OBJ file in the Memory Card will be read to the CPU Unit (pin 2 on the DIP switch must be ON). • Program replacement during operation...

  • Page 401: Trial Operation And Debugging

    When the CPU Unit detects that a bit set by a Programming Device has changed from OFF to ON or from ON to OFF, the results are indicated in the a Differentiate Monitor Completed Flag (A50809). The Flag will turn ON when conditions set for the differential monitor have been met.

  • Page 402: Online Editing

    7-2-3 Online Editing The Online Editing function is used to add to or change part of a program in a CPU Unit directly from the Programming Devices when the CPU Unit is in MONITOR or PROGRAM mode. Additions or changes are made one instruc- tion at a time for the Programming Console and one or more program sections at a time from the CX-Programmer.
  • Page 403 Operating in MONITOR mode. The cycle time will be increased by from one to several cycle times if the pro- gram in the CPU Unit is edited online in MONITOR mode. The cycle time will also be increased to back up data in the flash memory after online editing.
  • Page 404 Section 7-2 Trial Operation and Debugging When using a pre-EV1 CS1 CPU Unit, the size of the task that is being edited will determine the length of time that a program will be stopped for online edit- ing. By splitting the program into smaller tasks, the amount of time that the cycle is extended will be shorter using the Online Editing function than with previous PLC models.

  • Page 405: Tracing Data

    OFF (this applies to the built-in general-purpose or pulse outputs on CJ1M CPU Units as well), and the INH indicator on the front of the CPU Unit will turn The status of the Output OFF Bit is maintained even if power is turned OFF and ON.
  • Page 406 • Specified sampling time (10 to 2,550 ms in 10-ms units) • One sample per cycle • When the TRACE MEMORY SAMPLING instruction (TRSM) is executed Up to 31 bits and 6 words in I/O memory can be specified for sampling. Trace Memory capacity is 4,000 words. Basic Procedure 1,2,3...
  • Page 407 A scheduled data trace will sample data at fixed intervals. Specified sampling times are 10 to 2,550 ms in 10-ms units. Do not use the TRSM instruction in the user program and be sure to set the sampling period higher than 0.
  • Page 408 Section 7-2 Trial Operation and Debugging 4. End tracing. Shows the sampled values of specified words. Shows the sampled status of specified bits.

  • Page 409: And Cv-Series Plcs

    250 Ksteps 2 Kwords 62 Kwords 15.2 Kwords capacity One step is basically equivalent to one word. (63.2 Kwords Refer to the end of 10-5 Instruction Execution for -Z) Times and Number of Steps in the Operation Manual for details.
  • Page 410 Programming Console mode is connected) Disabling Power Interrupt Processing Battery-free operation Enabled using Memory Card or flash memory. Memory Card Memory Card Memory Cas- sette Automatic backup to flash memory (user program and parameter area) Restart continuation...
  • Page 411 Programs, I/O Programs, I/O Programs, memory, memory, read-only DM, parameters parameters parameters Read/write method Programming Device, user program (file mem- Turning ON Programming Turning ON ory instructions), or Host Link SR bit Device, user AR bit program (file memory instructions),...
  • Page 412 Peripheral cations eral port Host Link (SYSMAC (Possible with WAY) connection to peripheral interface) Serial Yes (CPU Units with unit version 3.0 or later) Gateway (conver- sion to Compo- Way/F) No proto- NT Link Peripheral Unit built-in Host Link (SYSMAC...
  • Page 413 0.1 ms Built-in I/O on CJ1 CPU Units: 1 ms 0.12 ms CJ-series I/O: 0.1 ms PLC Setup Area No user addresses (Setting is possible from Fixed DM No user Fixed DM CX-Programmer or Programming Console.) Area alloca- addresses Area alloca-...
  • Page 414 Set in PLC Setup Set in PLC set- for Basic I/O Unit Setup tings Rack first addresses Set in I/O table from Programming Device (but Set in PLC order of rack numbers is fixed). Setup (Rack No. order can be set.)
  • Page 415 Setup (1 to Setup(1 to 9,999 ms) 32,000 ms) 9,999 ms) Monitor cycle time Set in PLC Setup (10 to 40,000 ms) (Initial set- Set in PLC Set in PLC Set in PLC ting: 1,000 ms fixed) Setup (0 to...
  • Page 416 Input using symbols, e.g., ER. iary tion Always ON/OFF Area Flags Flag, etc. Clock pulses Input using symbols, e.g., 0.1 s. Servic- CPU Service Dis- able Bit Codes for con- nected devices Peripherals process- ing cycle times CPU Bus Unit ser-...
  • Page 417 Error log storage iary area/pointer Area, Error codes contd Initial Initializing PLC settings Setup Com- PLC Link Operating Yes (PLC Link Auxiliary Area bit) Yes (AR) munica- Level Flags tions Power Power Interruption supply Flag Power Interruption Time Power ON Time...
  • Page 418 CIO Area Allocation in Special I/O Unit Area according to Allocation in Same as for Same as for I/O Unit Unit No. 10 words per Unit for total of 96 Units. Special I/O Basic I/O Basic I/O alloca- Unit Area (in Units;...
  • Page 419 @ is used. for indirect for DM/ addressing 0000 to 7FFF Hex: 0000 to 31767 using PLC 8000 to FFFF Hex: 00000 to 32767 in next memory bank addresses. Allocation meth- Setting first word on Yes (for all CPU Units)
  • Page 420 (.STD) CPU Units Ver. 2.0 or later: Yes Note 1. For CPU Units manufactured June 1, 2002 or later (lot numbers 020601@@@@ or later), up to eight slot addresses can be set. 2. When a network with 8 levels is constructed, Routing tables must be set using CX-Integrator or CX-...
  • Page 421 DIFD) AND↑, OR↑)/ DIFD) (LD↓, AND↓, OR↓) SET and RESET SET/ RSET MULTIPLE BIT SETA/ Yes (Beginning bit and number of bits speci- (*1) SET/RESET RSTA fied in binary.) (Beginning bit and number of bits specified in BCD.) SINGLE BIT...
  • Page 422 (binary) COUNTER (BCD) CNTX Yes (*4) (binary) REVERSIBLE CNTR COUNTER (BCD) CNTRX Yes (*4) (binary) RESET TIMER/ Yes (Only resets timer or counter.) Yes (Also COUNTER (BCD) clears speci- fied range in CIO area to zero.) CNRX Yes (*4) (binary)
  • Page 423 CQM1H monic Series Series CJ1-H-R CJ1-H CJ1-M Compari- Symbol compari- =, <, Yes (All are supported for LD, OR, and AND) Yes (*2) (Sup- Yes (*1) (Sup- etc. ported for ported for Instruc- AND only) AND only) tions Data Compari-...
  • Page 424 BCD: 0 fied in BCD: 0 fied in BCD: 0 DISTC Yes (*7) (Offset value specified in BCD: 0 to to 8999.) to 9999.) to 8999.) 8999.) DATA COLLECT COLL Yes (Offset value specified in binary: 0 to...
  • Page 425 SHIFT N-BIT ning bit speci- DATA RIGHT fied in BCD.) (*1) SHIFT N-BITS NASL/ Yes (Number of bits to be shifted specified in Yes (Number LEFT/SHIFT N- NASR, binary.) of bits to be BITS RIGHT/ NSLL/ shifted speci-...
  • Page 426 BINARY BINARY-TO- BCD/ BCD/DOUBLE BCDL BINARY-TO- DOUBLE BCD 2’S COMPLE- NEG/ Yes (Same as CV but UP does not turn ON MENT/ DOUBLE NEGL for 8000 Hex at source) 2’S COMPLE- MENT 16-BIT TO 32-BIT SIGN SIGNED BINARY DATA DECODER MLPX...
  • Page 427 BCNTC Yes (*7) (Number of words to count and count results count results count results count results in BCD: 0 to 9999) in BCD: 1 to...
  • Page 428 SCALING 3 SCL3 PID CONTROL Yes (Output can be switched between 0% Yes (PID and Yes (PID and Yes (PID and and 50% when PV = SV. PID and sampling sampling sampling sampling period specified in binary.) period speci- period speci-...
  • Page 429 CS1-H C200HX/HG/ CVM1/CV CQM1H monic Series Series CJ1-H-R CJ1-H CJ1-M Subrou- SUBROUTINE SBS, Yes (Subroutine number: 0 to 1023) Yes (Subrou- Yes (Subrou- Yes (Subrou- tines CALL/SUBROU- SBN, tine number tine number tine number Instruc- TINE ENTRY/ specified in specified in...
  • Page 430 SPECIAL I/O FIORF O Unit UNIT I/O Instruc- REFRESH tions SPECIAL I/O IORD/ IORD/IOWR (Up to 96 Units. Will not be used IORD/IOWR READ/WRIT UNIT READ and IOWR to send FINS commands any more. SPECIAL I/0 (READ/ UNIT WRITE WRIT)
  • Page 431 Serial Communications Boards with bytes speci- bytes speci- Instruc- unit version 1.2 or later. Cannot be used for fied in BCD) fied in BCD) tions CPU Unit’s peripheral port.) (Used for (Used for...
  • Page 432 Yes (Messages ended by NUL, text strings Yes (Mes- Yes (Mes- Yes (Mes- Diagno- ALARM/SEVERE FALS stored in order of leftmost to rightmost byte sages ended sages ended sages ended FAILURE ALARM and then rightmost to leftmost word. FAL by CR, text...
  • Page 433 *3: Continuation on same program run supported by CV1M version 2. *4: Except for CS1G/H-CPU@@(-V1) and CJ1@-CPU@@ CPU Units. *5: CJ1M CPU Units with built-in I/O only. Some operands differ from those used by the CQM1H. *6: Supported by CPU Units with unit version 2.0 or later.
  • Page 434 Appendix A PLC Comparison Charts...

  • Page 435: Changes From Previous Host Link Systems

    There are differences between Host Link Systems created using the CS/CJ-series Serial Communications Boards (CS Series only) and Unit in comparison to Host Link Systems created with Host Link Units and CPU Units in other PLC product series. These differences are described in this sections.
  • Page 436 CS/CJ command specifications. Note The number of words that can be read and written per frame (i.e., the text lengths) when using C-mode commands is different for C-series Host Link Units and CS/CJ-series Serial Communications Boards/ Units.
  • Page 437 Unit CJ command specifications. Note The number of words that can be read and written per frame (i.e., the text lengths) when using C-mode commands is different for C-series Host Link Units and CS/CJ-series Serial Communications Boards/ Units. A host computer program previously used for C-series Host Link Units may not function correctly if used for CS/CJ-series PLCs.

  • Page 438: B Changes From Previous Host Link Systems

    Appendix B Changes from Previous Host Link Systems...

  • Page 439: Index

    – indirect addresses internal structure memory addresses operation operands C-series Host Link Units See also index registers changes in communications specifications alarms C-series Units user-programmed alarms changes in communications specifications applications CVM1 Units file memory –...
  • Page 440 Index initializing operations See also file memory high-speed inputs Equals Flag Host Link commands error log Host Link communications errors Host Link Units access error changes in communications specifications error log hot starting failure point detection hot stopping fatal illegal instruction error...
  • Page 441 FOR/NEXT loops turning OFF mathematics Parameter Area floating-point math instructions files special math instructions Parameter Date symbol math instructions peripheral servicing maximum cycle time priority servicing memory Peripheral Servicing Priority Mode block diagram of CPU Unit memory PLC Setup clearing...
  • Page 442 Polled Units Programming Devices settings file memory task operations Polling Unit setting programs See also programming Polling Unit link method power flow description power interrupts range instructions disabling read/write-protection power OFF detection delay record-table instructions power OFF interrupts refresh mode –...
  • Page 443 Condition Flags relationship to block programs See also cyclic tasks See also interrupt tasks status task control instructions task numbers timers text strings operands text string processing instructions...
  • Page 444 Index...

  • Page 445: Revision History

    Revision History A manual revision code appears as a suffix to the catalog number on the front cover of the manual. Cat. No. W394-E1-14 Revision code The following table outlines the changes made to the manual during each revision. Page numbers refer to the previous version.
  • Page 446 July 2004 Changes were made throughout the manual related to information on new functions supported by the upgrade from unit version 2.0 to unit version 3.0 of the CS/CJ-series CPU Units, includ- ing the following changes: Page 8: Changed graphic.
  • Page 448 OMRON (CHINA) CO., LTD. OMRON ASIA PACIFIC PTE. LTD. In the interest of product improvement, Room 2211, Bank of China Tower, No. 438A Alexandra Road # 05-05/08 (Lobby 2), specifications are subject to change without notice. 200 Yin Cheng Zhong Road, Alexandra Technopark,...

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