Address Registers; Data Organization In Memory - Motorola M68000 User Manual

When a data register is used as either a source or a destination operand, only the
appropriate low-order portion is changed; the remaining high-order portion is neither
used nor changed.

2.3.2 Address Registers

Each address register (and the stack pointer) is 32 bits wide and holds a full, 32-bit
address. Address registers do not support byte-sized operands. Therefore, when an
address register is used as a source operand, either the low-order word or the entire
long-word operand is used, depending upon the operation size. When an address
register is used as the destination operand, the entire register is affected, regardless of
the operation size. If the operation size is word, operands are sign-extended to 32 bits
before the operation is performed.
2.4

DATA ORGANIZATION IN MEMORY

Bytes are individually addressable. As shown in Figure 2-5, the high-order byte of a
word has the same address as the word. The low-order byte has an odd address, one
count higher. Instructions and multibyte data are accessed only on word (even byte)
boundaries. If a long-word operand is located at address n (n even), then the second
word of that operand is located at address n+2.
15
ADDRESS
$000000
$000002
$FFFFFE
The data types supported by the M68000 MPUs are bit data, integer data of 8, 16, and
32 bits, 32-bit addresses, and binary-coded-decimal data. Each data type is stored in
memory as shown in Figure 2-6. The numbers indicate the order of accessing the data
from the processor. For the MC68008 with its 8-bit bus, the appearance of data in
memory is identical to the all the M68000 MPUs. The organization of data in the memory
of the MC68008 is shown in Figure 2-7.
2-6 M68000 8-/16-/32-BIT MICROPROCESSOR USER'S MANUAL
Freescale Semiconductor, Inc.
14 13 12 11 10 9
BYTE 000000
BYTE 000002
BYTE FFFFFE
Figure 2-5. Word Organization in Memory
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8 7 6 5 4
WORD 0
BYTE 000001
WORD 1
BYTE 000003
WORD 7FFFFF
BYTE FFFFFE
3 2 1 0
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