Outline; Features - Epson CMOS 32-Bit Single Chip Microcomputer S1C33L03 Technical Manual

Cmos 32-bit single chip microcomputer
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1 Outline

The S1C33L03 is a Seiko Epson original 32-bit microcomputer with a built-in LCD controller. It features high
speed, low power and low-voltage operation and is most suitable for portable equipment that needs display
function, such as information terminals, E-mail terminals, electronic dictionaries.
The S1C33L03 consists of the S1C33000 32-bit RISC type CPU as the core, a bus control unit, a DMA controller,
an interrupt controller, an LCD controller, an SDRAM controller, timers, serial interface circuits, an A/D converter,
ROM and RAM.
The S1C33L03 provides a DSP function, by using the internal MAC (multiplication and accumulation) operation
function with the A/D converter, it makes it possible to design simply speech recognition and voice synthesis
systems.
Model
S1C33L03F00A100
QFP20-144pin
QFP20-144pin
S1C33L03F00A200
(Pb-free package)
S1C33L03D00A100

1.1 Features

Core CPU
Seiko Epson original 32-bit RISC CPU S1C33000 built-in
• Basic instruction set: 105 instructions (16-bit fixed size)
• Sixteen 32-bit general-purpose register
• 32-bit ALU and 8-bit shifter
• Multiplication/division instructions and MAC (multiplication and accumulation) instruction are available
• 20 ns of minimum instruction execution time at 50 MHz operation
Internal memory
RAM: 8K bytes
Internal peripheral circuits
Oscillation circuit:
LCD controller:
Timers:
Serial interface:
A/D converter:
DMA controller:
S1C33L03 PRODUCT PART
Table 1.1 Model Lineup
Package
Internal RAM
8K bytes
8K bytes
Chip
8K bytes
High-speed (OSC3) oscillation circuit 33 MHz max.
Crystal/ceramic oscillator or external clock input
Low-speed (OSC1) oscillation circuit 32.768 kHz typ.
Crystal oscillator or external clock input
4 or 8-bit monochrome/color LCD interface (based on the S1D13705)
2, 4 or 16-level (1, 2 or 4 bit-per-pixel) gray-scale display
2, 4, 16 or 256-level (1, 2, 4 or 8 bit-per-pixel) color display
Resolution examples: 640 480 pixels with 1-bpp color depth
8-bit timer
16-bit timer
Watchdog timer
Clock timer
4 channels (clock-synchronous system, asynchronous system and IrDA
interface are selectable)
10 bits
8 channels
High-speed DMA
Intelligent DMA
EPSON
Internal ROM
None
None
None
640 240 pixels with 2-bpp color depth
320 240 pixels with 4-bpp color depth
240 160 pixels with 8-bpp color depth
6 channels
6 channels
(16-bit timer 0's function)
1 channel (with alarm function)
4 channels
128 channels
1 OUTLINE
A-1
Data bus I/F
CMOS/LVTTL
CMOS/LVTTL
CMOS/LVTTL
A-1

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