Epson CMOS 32-Bit Single Chip Microcomputer S1C33L03 Technical Manual page 105

SRAM write cycle (basic cycle: 2 cycles)
BCLK
A[23:0]
#CEx
#WR
D[15:0]
#WAIT
SRAM write cycle (when wait cycles are inserted)
C1
BCLK
t
AD
A[23:0]
t
CE1
#CEx
#WR
D[15:0]
t
WTS
#WAIT
S1C33L03 PRODUCT PART
C1
t
AD
t
CE1
t
WRD1
t
WDD1
t t
WTS WTH
Cw
(wait cycle)
Wait cycle follows
t
WRD1
t
WDD1
t t t
WTH WTS WTH
EPSON
8 ELECTRICAL CHARACTERISTICS
C2
t
WRD2
t
WRW
Cw
(wait cycle)
Last cycle follows
t
WRW
t t
WTS WTH
t
AD
t
CE2
t
WDH
Cn
(last cycle)
t
AD
t
CE2
t
WRD2
t
WDH
A-89
A-1
A-8