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VII LCD CONTROLLER BLOCK: LCD CONTROLLER
Register name
Address
Bit
Vertical
039FFEA
D7
non-display
(B)
D6
period register
D5
D4
D3
D2
D1
D0
MOD rate
039FFEB
D7–6
register
(B)
D5
D4
D3
D2
D1
D0
Screen 1
039FFEC
D7
start address
(B)
D6
register 0
D5
D4
D3
D2
D1
D0
Screen 1
039FFED
D7
start address
(B)
D6
register 1
D5
D4
D3
D2
D1
D0
Screen 2
039FFEE
D7
start address
(B)
D6
register 0
D5
D4
D3
D2
D1
D0
Screen 2
039FFEF
D7
start address
(B)
D6
register 1
D5
D4
D3
D2
D1
D0
Screen 1
039FFF0
D7–1
start address
(B)
D0
register 2
Memory
039FFF1
D7
address offset
(B)
D6
register
D5
D4
D3
D2
D1
D0
Screen 1
039FFF2
D7
vertical size
(B)
D6
register 0
D5
D4
D3
D2
D1
D0
B-VII-2-32
Name
Function
VNDPF
Vertical non-display period status
–
reserved
VNDP5
Vertical non-display period
VNDP4
VNDP3
VNDP2
VNDP1
VNDP0
–
reserved
MODRATE5
MOD rate
MODRATE4
MODRATE3
MODRATE2
MODRATE1
MODRATE0
S1ADDR7
Screen 1 start address
S1ADDR6
(low-order 8 bits)
S1ADDR5
S1ADDR4
S1ADDR3
S1ADDR2
S1ADDR1
S1ADDR0
S1ADDR15
Screen 1 start address
S1ADDR14
(high-order 8 bits)
S1ADDR13
S1ADDR12
S1ADDR11
S1ADDR10
S1ADDR9
S1ADDR8
S2ADDR7
Screen 2 start address
S2ADDR6
(low-order 8 bits)
S2ADDR5
S2ADDR4
S2ADDR3
S2ADDR2
S2ADDR1
S2ADDR0
S2ADDR15
Screen 2 start address
S2ADDR14
(high-order 8 bits)
S2ADDR13
S2ADDR12
S2ADDR11
S2ADDR10
S2ADDR9
S2ADDR8
–
reserved
S1ADDR16
Screen 1 start address (MSB)
(for portrait mode;
fix at 0 in landscape mode)
MADOFS7
Memory address offset
MADOFS6
MADOFS5
MADOFS4
MADOFS3
MADOFS2
MADOFS1
MADOFS0
S1VSIZE7
Screen 1 vertical size
S1VSIZE6
(low-order 8 bits)
S1VSIZE5
S1VSIZE4
S1VSIZE3
S1VSIZE2
S1VSIZE1
S1VSIZE0
Setting
1 VNDP
0 Display
–
Non display period (lines)
–
–
EPSON
Init. R/W
Remarks
0
R
–
–
0 when being read.
0
R/W
0
0
0
0
0
–
–
0 when being read.
0
R/W
0
0
0
0
0
0
R/W
0
0
0
0
0
0
0
0
R/W
0
0
0
0
0
0
0
0
R/W
0
0
0
0
0
0
0
0
R/W
0
0
0
0
0
0
0
–
–
0 when being read.
0
R/W
0
R/W
0
0
0
0
0
0
0
0
R/W
0
0
0
0
0
0
0
S1C33L03 FUNCTION PART
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