Epson CMOS 32-Bit Single Chip Microcomputer S1C33L03 Technical Manual page 560

Cmos 32-bit single chip microcomputer
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VII LCD CONTROLLER BLOCK: LCD CONTROLLER
4. Write a portrait-mode display image into memory, such as A
5. In the line byte-count register (0x39FFFC) for portrait-mode use, set the number of bytes equivalent to
one virtual line of portrait display (256 pixels). For 8-bpp mode, with one pixel per byte, it is 256 bytes
(0x100). Write 0x0 to the line byte-count register (0x39FFFC) for a one-byte line count. The value 0x0 is
assumed to be 256 bytes per line. Therefore, the horizontal size of an image that can be displayed in 8-
bpp portrait mode is 256 pixels at maximum. For 4-bpp mode, with 2 pixels per byte, the byte count is
256/2 = 128 (0x80). This value indicates the distance in memory between one piece of pixel data and the
next piece of pixel data when an image is displayed in portrait form.
6. Write the display memory address at which pixel B exists to the screen 1 start address register
(0x39FFEC, 0x39FFED, D0/0x39FFF0). Although halfword addresses are set in this register in landscape
mode, addresses must be set in byte units in portrait mode. In the example discussed here, because pixel
A is at 0x0, the offset from A to B is 240 - 1 = 239 (0xEF) bytes. For 4-bpp mode, this is 240/2 - 1 = 119
(0x77) bytes.
7. If necessary, select the pixel clock frequency for use in portrait mode by using the PMODCLK[1:0]
(D[1:0])/portrait mode register (0x39FFFB). This clock division circuit is provided specifically for
portrait display on a small LCD panel. If the pixel clock frequency is changed here, the frame rate must
be reviewed, including resetting of the non-display-period parameters.
PMODCLK1
CLK denotes the LCDC clock selected using the LCLKSEL[2:0] (D[2:0])/FIFO control register
(0x39FFF4).
8. Set default portrait mode.
PMODEN (D7)/portrait mode register (0x39FFFB) = "1"
PMODSEL (D6)/portrait mode register (0x39FFFB) = "0"
Upon completion of the above setting, the display mode is switched to portrait mode.
In the example discussed here, the display memory contains blank space equivalent to 16 horizontal pixels.
This portion can be used in the same way as a memory address offset, which is set in order to configure a
virtual screen in landscape mode. Therefore, images can be panned within the scope of this number of pixels.
The image displayed on the screen is moved to the left or right by incrementing or decrementing the screen 1
start address register in 1-byte units. Note that settings of the memory-address offset register have no effect in
portrait mode.
Images can also be scrolled in the vertical direction by changing the screen 1 start address register.
Note: In default portrait mode, the screen cannot be scrolled in the vertical direction one line at a time.
Always make sure the screen is scrolled two lines at a time. To this end, increment or decrement
the screen 1 start address register by an amount equal to twice the number of bytes set in the line
byte count register (0x39FFFC) in step 5.
B-VII-2-26
Table 2.14 Clock Settings for Default Portrait Mode
PMODCLK0
Pixel clock PCLK
0
0
0
1
1
0
1
1
B ... C
Memory clock MCLK
CLK
CLK/2
CLK/2
CLK/4
CLK/4
CLK/8
CLK/8
EPSON
D.
CLK
S1C33L03 FUNCTION PART

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