Epson CMOS 32-Bit Single Chip Microcomputer S1C33L03 Technical Manual page 271

Cmos 32-bit single chip microcomputer
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Register name
Address
Bit
8-bit timer 2/3
004014E
D7
clock control
(B)
D6
register
D5
D4
D3
D2
D1
D0
A/D clock
004014F
D7–4
control register
(B)
D3
D2
D1
D0
Power control
0040180
D7
register
(B)
D6
D5
D4–3
D2
D1
D0
Prescaler clock
0040181
D7–1
select register
(B)
D0
Power control
004019E
D7
protect register
(B)
D6
D5
D4
D3
D2
D1
D0
PSCON: Prescaler on/off control (D5) / Power control register (0x40180)
Turns the prescaler on or off.
Write "1": On
Write "0": Off
Read: Valid
The source clock is input to the prescaler by writing "1" to PSCON, thereby starting a dividing operation.
The prescaler is turned off by writing "0". If the peripheral circuits do not need to be operated, write "0" to this bit
to reduce current consumption. Since PSCON is protected against writing the same as SOSC1, SOSC3, CLKCHG
and CLKDT[1:0], CLGP[7:0] must be set to "0b10010110" before PSCON can be changed.
In addition, writing "0" (Off) to PSCON stops supplying the source clock to the prescaler and stops the peripheral
circuits that use the same clock (e.g., 16-bit programmable timers, 8-bit programmable timers, A/D converter,
serial interface, and ports). Therefore, do not turn off the prescaler when these peripheral circuits are used.
At initial reset, PSCON is set to "1" (On).
S1C33L03 FUNCTION PART
Name
Function
P8TON3
8-bit timer 3 clock control
P8TS32
8-bit timer 3
P8TS31
clock division ratio selection
P8TS30
P8TON2
8-bit timer 2 clock control
P8TS22
8-bit timer 2
P8TS21
clock division ratio selection
P8TS20
reserved
PSONAD
A/D converter clock control
PSAD2
A/D converter clock division ratio
PSAD1
selection
PSAD0
CLKDT1
System clock division ratio
CLKDT0
selection
PSCON
Prescaler On/Off control
reserved
CLKCHG
CPU operating clock switch
SOSC3
High-speed (OSC3) oscillation On/Off
SOSC1
Low-speed (OSC1) oscillation On/Off
reserved
PSCDT0
Prescaler clock selection
CLGP7
Power control register protect flag
CLGP6
CLGP5
CLGP4
CLGP3
CLGP2
CLGP1
CLGP0
EPSON
III PERIPHERAL BLOCK: PRESCALER
Setting
Init. R/W
1 On
0 Off
0
P8TS3[2:0]
Division ratio
0
1
1
1
/256
0
1
1
0
/128
0
1
0
1
/64
1
0
0
/32
0
1
1
/16
0
1
0
/8
0
0
1
/4
0
0
0
/2
1 On
0 Off
0
P8TS2[2:0]
Division ratio
0
1
1
1
/4096
0
1
1
0
/2048
0
1
0
1
/64
1
0
0
/32
0
1
1
/16
0
1
0
/8
0
0
1
/4
0
0
0
/2
1 On
0 Off
0
P8TS0[2:0]
Division ratio
0
1
1
1
/256
0
1
1
0
/128
0
1
0
1
/64
1
0
0
/32
0
1
1
/16
0
1
0
/8
0
0
1
/4
0
0
0
/2
CLKDT[1:0]
Division ratio
0
1
1
1/8
0
1
0
1/4
0
1
1/2
0
0
1/1
1 On
0 Off
1
0
1 OSC3
0 OSC1
1
1 On
0 Off
1
1 On
0 Off
1
0
1 OSC1
0 OSC3/PLL
0
Writing 10010110 (0x96)
0
removes the write protection of
0
the power control register
0
(0x40180) and the clock option
0
register (0x40190).
0
Writing another value set the
0
write protection.
0
0
A-1
Remarks
R/W
R/W
: selected by
Prescaler clock select
register (0x40181)
8-bit timer 3 can
generate the clock for
the serial I/F Ch.1.
R/W
R/W
: selected by
Prescaler clock select
register (0x40181)
8-bit timer 2 can
generate the clock for
the serial I/F Ch.0.
0 when being read.
R/W
R/W
: selected by
Prescaler clock select
register (0x40181)
R/W
B-III
R/W
Writing 1 not allowed.
R/W
R/W
PSC
R/W
R/W
R/W
B-III-2-5

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