Operations And Functions Of The S5U1C63000H6; Outline Of Operation - Epson S5U1C63000H6 Manual

Cmos 4-bit single chip microcomputer (s1c63 family in-circuit emulator)
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5 OPERaTIOnS anD FUnCTIOnS OF THE S5U1C63000H6

5 Operations and Functions of the
S5U1C63000H6
This chapter describes operations, functions in detail and restrictions in the emulation mode of the S5U1C63000H6.

5.1 Outline of Operation

ICE firmware
The S5U1C63000H6 has a processor to control in-circuit emulation, which processes the commands. The function
to execute or stop target programs by the S1C63000 CPU is called emulation, and it is controlled by the emulation
control unit.
The operating mode while the S1C63000 CPU is running (specified by the G command) or single stepping (specified
by the S or N command) is called emulation mode. The EMU LED lights in this mode. The other status is called
standby mode in which the EMU LED goes out.
The target program to be executed with the S1C63000 CPU is stored in the emulation program memory and
data RAM area of the S1C63000 CPU is assigned to the emulation data memory. In the standby mode, the
S5U1C63000H6 control processor loads the program from the host computer.
The trace control unit consists of a memory of 8,192 words × 120 bits and records execution bus cycles of the
S1C63000 CPU. The memory enables the register value inside the S1C63000 CPU to be real timely recorded. The
program execution is traced in the emulation mode and the traced information is analyzed by the S5U1C63000H6
control processor in the standby mode.
The break control unit compares the bus condition of the S1C63000 CPU with break points and stops the execution
of the target program upon coincident. The break can be also real timely made by register values of the S1C63000
CPU.
While the target program is running, the S5U1C63000H6 control processor monitors the executed program counter
value of the S1C63000 CPU and RAM contents at watching points via the target monitor unit. The monitored re-
sults are displayed as on-the-fly information. The S1C63000 CPU can real timely execute the target program while
the information is displayed.
8
ICE control
processor
Emulation control portion
Emulation program memory
Emulation data memory
Trace control unit
Break control unit
Target monitor unit
Figure 5.1.1 Function Block Diagram of the S5U1C63000H6
EPSOn
S1C63000
CPU
To peripheral circuit board
S5U1C63000H6 ManUal
(S1C63 Family In-Circuit Emulator)

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