Epson CMOS 32-Bit Single Chip Microcomputer S1C33L03 Technical Manual page 108

8 ELECTRICAL CHARACTERISTICS
DRAM CAS-before-RAS refresh cycle
BCLK
#RAS
#HCAS/
#LCAS
#WE
DRAM self-refresh cycle
BCLK
#RAS
#HCAS/
#LCAS
SDRAM clock
(1) #X2SPD = high (CPU clock : SDRAM clock = 1 : 1)
OSC3
(High-speed clock)
BCLK
(SDRAM clock output)
(2) #X2SPD = low (CPU clock : SDRAM clock = 2 : 1)
BCLK
(SDRAM clock output)
A-92
CBR refresh cycle
C
CBR1
t
CASD1
Self-refresh mode setup Self-refresh mode
t
RASD1
t
CASD1
t
C3
t
t
CBD
CBH
t
C3
t
CBH
EPSON
C C
CBR2 CBR3
t
RASD1
t
CASD2
Self-refresh mode canceration
6-cycle precharge
(Fixed)
t
RASD2
t
CASD2
t t
= /
CBH C3
t
CBD
t
RASD2
t t
= /
CBH C3
S1C33L03 PRODUCT PART