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DE8TU0:
Timer 0 IDMA enable (D2) / 16-bit timer 5, 8-bit timer, serial I/F Ch.0 IDMA enable register (0x40296)
DE8TU1:
Timer 1 IDMA enable (D3) / 16-bit timer 5, 8-bit timer, serial I/F Ch.0 IDMA enable register (0x40296)
DE8TU2:
Timer 2 IDMA enable (D4) / 16-bit timer 5, 8-bit timer, serial I/F Ch.0 IDMA enable register (0x40296)
DE8TU3:
Timer 3 IDMA enable (D5) / 16-bit timer 5, 8-bit timer, serial I/F Ch.0 IDMA enable register (0x40296)
Enables IDMA transfer by means of an interrupt factor.
When using the set-only method (default)
Write "1": IDMA enabled
Write "0": Not changed
Read: Valid
When using the read/write method
Write "1": IDMA enabled
Write "0": IDMA disabled
Read: Valid
If DE8TUx is set to "1", the IDMA request by the interrupt factor is enabled. If the register bit is set to "0", the
IDMA request is disabled.
After an initial reset, DE8TUx is set to "0" (IDMA disabled).
Programming Notes
(1) The 8-bit programmable timer operates only when the prescaler is operating.
(2) Do not use a clock that is faster than the CPU operating clock for the 8-bit programmable timer.
(3) When setting an input clock, make sure the 8-bit programmable timer is turned off.
(4) Since the underflow interrupt condition and the timer output status are undefined after an initial reset, the
counter initial value should be set to the 8-bit timer before resetting the interrupt factor flag or turning the
timer output on.
(5) After an initial reset, the interrupt factor flag (F8TUx) becomes indeterminate. To prevent generation of an
unwanted interrupt or IDMA request, be sure to reset this flag in the software.
(6) To prevent another interrupt from being generated again by the same factor after an interrupt has occurred, be
sure to reset the interrupt factor flag (F8TUx) before setting the PSR again or executing the reti instruction.
S1C33L03 FUNCTION PART
III PERIPHERAL BLOCK: 8-BIT PROGRAMMABLE TIMERS
EPSON
A-1
B-III
8TM
B-III-3-17
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