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Epson S1C63808 Technical Manual

Epson S1C63808 Technical Manual

Cmos 4-bit single chip microcomputer
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CMOS 4 - BIT SINGLE CHIP MICROCOMPUTER
S1C63808
Technical Manual

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  • Page 1 CMOS 4 - BIT SINGLE CHIP MICROCOMPUTER S1C63808 Technical Manual...
  • Page 2 No part of this material may be reproduced or duplicated in any form or by any means without the written permission of Seiko Epson. Seiko Epson reserves the right to make changes to this material without notice. Seiko Epson does not assume any...
  • Page 3 Configuration of product number Devices 63158 0A01 Packing specifications 00 : Besides tape & reel 0A : TCP BL 2 directions 0B : Tape & reel BACK 0C : TCP BR 2 directions 0D : TCP BT 2 directions 0E : TCP BD 2 directions 0F : Tape &...

  • Page 5: Table Of Contents

    4.4 Input Ports (K00–K03 and K10–K13) ............28 4.4.1 Configuration of input ports ..............28 4.4.2 Interrupt function ..................28 4.4.3 Mask option ....................29 4.4.4 I/O memory of input ports ................. 30 4.4.5 Programming notes ................... 32 EPSON S1C63808 TECHNICAL MANUAL...
  • Page 6 4.10.5 Transmit-receive control ................. 76 4.10.6 Operation of clock synchronous transfer ..........77 4.10.7 Operation of asynchronous transfer ............82 4.10.8 Interrupt function ..................87 4.10.9 I/O memory of serial interface ..............89 4.10.10 Programming notes ................96 EPSON S1C63808 TECHNICAL MANUAL...
  • Page 7 7.2 Recommended Operating Conditions ............130 7.3 DC Characteristics ..................130 7.4 Analog Circuit Characteristics and Power Current Consumption .... 131 7.5 Oscillation Characteristics ................. 133 7.6 Serial Interface AC Characteristics ............135 7.7 Timing Chart ....................136 EPSON S1C63808 TECHNICAL MANUAL...
  • Page 8 8.2 Ceramic Package for Test Samples ............. 138 ____________________________________________ 139 CHAPTER AYOUT 9.1 Diagram of Pad Layout ................139 9.2 Pad Coordinates ..................140 S1C63808 ____________________ 141 APPENDIX ERIPHERAL IRCUIT OARDS FOR A.1 Names and Functions of Each Part ............141 A.2 Connecting to the Target System ..............

  • Page 9: Chapter Utline

    CHAPTER UTLINE The S1C63808 is a microcomputer which has a high-performance 4-bit CPU S1C63000 as the core CPU, ROM (8,192 words × 13 bits), RAM (2,048 words × 4 bits), multiply-divide circuit, serial interface (2 ports), watchdog timer, programmable timer, time base counters (2 systems), and sound generator built-in. The S1C63808 features low current consumption, this makes it suitable for battery driven portable equipment such as clocks and watches.

  • Page 10: Block Diagram

    2,048 words × 4 bits Stopwatch Timer Programmable Power Timer/Counter –V Controller CA–CB K00–K03 Input Port K10–K13 TEST P00–P03 P10–P13 P20–P23 I/O Port P30–P33 Serial Interface P40–P43 Sound R00–R03 Output Port Generator R10–R13 Fig. 1.2.1 Block diagram EPSON S1C63808 TECHNICAL MANUAL...

  • Page 11: Pin Layout Diagram

    P10/SIN1 N.C. P11/SOUT1 TEST N.C. P12/SCLK1 RESET P13/SRDY1 N.C. P20/SIN2 R01/BZ P21/SOUT2 R02/TOUT P22/SCLK2 OSC1 R03/FOUT P23/SRDY2 OSC2 OSC3 OSC4 N.C. N.C. N.C. N.C. N.C. N.C. N.C. : No Connection Fig. 1.3.1 Pin layout diagram (QFP13-64pin) EPSON S1C63808 TECHNICAL MANUAL...

  • Page 12: Pin Description

    I/O port or serial I/F 2 clock I/O pin (selected by software) I/O port or serial I/F 2 ready signal output pin (selected by software) P30–P33 10–13 I/O port pins P40–P43 14, 15, 17, 18 I/O port pins RESET Initial reset input pin TEST Testing input pin EPSON S1C63808 TECHNICAL MANUAL...

  • Page 13: Mask Option

    The function option generator winfog, that has been prepared as the development software tool of S1C63808, is used for this selection. Mask pattern of the IC is finally generated based on the data created by winfog. Refer to the "S5U1C63000A Manual"...
  • Page 14 CHAPTER 1: OUTLINE <Option list> The following is the option list for the S1C63808. Multiple selections are available in each option item as indicated in the option list. Select the specifica- tions that meet the target system and check the appropriate box. Be sure to record the specifications for unused functions too.
  • Page 15 2. Use (K00, K01) 3. Use (K00, K01, K02) 4. Use (K00, K01, K02, K03) 8. SERIAL INTERFACE POLARITY 1. Negative 2. Positive 9. EPD DRIVER IC POWER SUPPLY BIAS 1. 1/3 bias 2. 1/2 bias EPSON S1C63808 TECHNICAL MANUAL...

  • Page 16: Chapter Power Supply And Initial Reset

    The S1C63808 operates by applying a single power supply within the above range between V and V The S1C63808 generates the voltages necessary for all the internal circuits and exclusive EPD driver IC by the built-in power supply circuits shown in Table 2.1.2.

  • Page 17: Initial Reset

    CHAPTER 2: POWER SUPPLY AND INITIAL RESET 2.2 Initial Reset To initialize the S1C63808 circuits, initial reset must be executed. There are three ways of doing this. (1) External initial reset by the RESET terminal (2) External initial reset by simultaneous high input to terminals K00–K03 (mask option setting) (3) Internal initial reset by the oscillation-detect circuit When the power is turned on, be sure to initialize using the reset function (1) or (2).

  • Page 18: Simultaneous High Input To Terminals K00-K03

    Index register X Undefined ∗ See Section 4.1, "Memory Map". Index register Y Undefined Program counter 0110H Stack pointer SP1 Undefined Stack pointer SP2 Undefined Zero flag Undefined Carry flag Undefined Interrupt flag Extension flag Queue register Undefined EPSON S1C63808 TECHNICAL MANUAL...

  • Page 19: Terminal Settings At Initial Resetting

    For setting procedure of the functions, see explanations for each of the peripheral circuits. 2.3 Test Terminal (TEST) This is the terminal used for the factory inspection of the IC. During normal operation, connect the TEST terminal to V EPSON S1C63808 TECHNICAL MANUAL...

  • Page 20: Chapter 3 Cpu, Rom, Ram

    The core CPU can linearly access the program space up to step FFFFH from step 0000H, however, the program area of the S1C63808 is step 0000H to step 1FFFH. The program start address after initial reset is assigned to step 0110H. The non-maskable interrupt (NMI) vector and hardware interrupt vectors are allocated to step 0100H and steps 0102H–010EH, respectively.
  • Page 21 4-bit data. 0000H 4-bit access area (SP2 stack area) 00FFH 0100H 4/16-bit access area (SP1 stack area) 01FFH 0200H 4-bit access area (Data area) 07FFH 4 bits Fig. 3.3.1 Configuration of data RAM EPSON S1C63808 TECHNICAL MANUAL...

  • Page 22: Peripheral Circuits And Operation

    4.1 Memory Map The S1C63808 data memory consists of 2,048-word RAM and 90-word peripheral I/O memory. Figure 4.1.1 shows the overall memory map of the S1C63808, and Table 4.1.1 the peripheral circuits' (I/O space) memory maps. 0000H...
  • Page 23 SIK02 SIK01 SIK00 SIK02 Enable Disable FF20H K00–K03 interrupt selection register SIK01 Enable Disable SIK00 Enable Disable Remarks ∗1 Initial value at initial reset ∗2 Not set in the circuit ∗3 Constantly "0" when being read EPSON S1C63808 TECHNICAL MANUAL...
  • Page 24 SIF1 is selected FF44H IOC11 Output Input P11 I/O control register (ESIF1=0) functions as a general-purpose register when SIF1 is selected IOC10 Output Input P10 I/O control register (ESIF1=0) functions as a general-purpose register when SIF1 is selected EPSON S1C63808 TECHNICAL MANUAL...
  • Page 25 – High IOC33 Output Input IOC43 IOC42 IOC41 IOC40 IOC32 Output Input FF50H P40–P43 I/O control register IOC31 Output Input IOC30 Output Input PUL43 PUL43 PUL42 PUL41 PUL40 PUL42 FF51H P40–P43 pull-down control register PUL41 PUL40 EPSON S1C63808 TECHNICAL MANUAL...
  • Page 26 1-shot buzzer pulse width setting ∗3 ∗2 – Unused BZFQ2 BZFQ1 BZFQ0 [BZFQ2, 1, 0] BZFQ2 Buzzer Frequency (Hz) 4096.0 3276.8 2730.7 2340.6 FF6EH BZFQ1 frequency [BZFQ2, 1, 0] BZFQ0 selection Frequency (Hz) 2048.0 1638.4 1365.3 1170.3 EPSON S1C63808 TECHNICAL MANUAL...
  • Page 27 High-order 8-bit destination register FF84H ∗2 DRH1 – (low-order 4 bits) ∗2 DRH0 – ∗2 DRH7 – DRH7 DRH6 DRH5 DRH4 ∗2 DRH6 – High-order 8-bit destination register FF85H ∗2 DRH5 – (high-order 4 bits) ∗2 DRH4 – EPSON S1C63808 TECHNICAL MANUAL...
  • Page 28 EISER1 EISTR1 EISRC1 EISER1 Enable Mask Interrupt mask register (Serial I/F 1 error) FFE1H EISTR1 Enable Mask Interrupt mask register (Serial I/F 1 transmit completion) EISRC1 Enable Mask Interrupt mask register (Serial I/F 1 receive completion) EPSON S1C63808 TECHNICAL MANUAL...
  • Page 29 Interrupt factor flag (Stopwatch direct RUN) IRUN ILAP ISW1 ISW10 ILAP Interrupt factor flag (Stopwatch direct LAP) FFF8H ISW1 Interrupt factor flag (Stopwatch timer 1 Hz) ISW10 Reset Invalid Interrupt factor flag (Stopwatch timer 10 Hz) EPSON S1C63808 TECHNICAL MANUAL...

  • Page 30: Watchdog Timer

    4.2.1 Configuration of watchdog timer The S1C63808 has a built-in watchdog timer that operates with a 256 Hz divided clock from the OSC1 as the source clock. The watchdog timer starts operating after initial reset, however, it can be stopped by the software.

  • Page 31: I/O Memory Of Watchdog Timer

    (1) When the watchdog timer is being used, the software must reset it within 3-second cycles. (2) Because the watchdog timer is set in operation state by initial reset, set the watchdog timer to disabled state (not used) before generating an interrupt (NMI) if it is not used. EPSON S1C63808 TECHNICAL MANUAL...

  • Page 32: Oscillation Circuit

    4.3.1 Configuration of oscillation circuit The S1C63808 has two oscillation circuits (OSC1 and OSC3). OSC1 is a crystal oscillation circuit that supplies the operating clock to the CPU and peripheral circuits. OSC3 is either a CR or a ceramic oscilla- tion circuit.

  • Page 33: Osc3 Oscillation Circuit

    CHAPTER 4: PERIPHERAL CIRCUITS AND OPERATION (Oscillation Circuit) 4.3.3 OSC3 oscillation circuit The S1C63808 has built-in the OSC3 oscillation circuit that generates the CPU's sub-clock (Max. 4.2 MHz) for high speed operation and the source clock for peripheral circuits needing a high speed clock (pro- grammable timer, FOUT output).

  • Page 34: Switching Of Cpu Clock

    Table 4.3.5.1 shows the instruction execution time according to each frequency of the system clock. Table 4.3.5.1 Clock frequency and instruction execution time Instruction execution time (µsec) Clock frequency 1-cycle instruction 2-cycle instruction 3-cycle instruction OSC1: 32.768 kHz OSC3: 200 kHz OSC3: 1.1 MHz OSC3: 2 MHz OSC3: 4 MHz EPSON S1C63808 TECHNICAL MANUAL...

  • Page 35: I/O Memory Of Oscillation Circuit

    (2) When switching the clock form OSC3 to OSC1, use a separate instruction for switching the OSC3 oscillation off. An error in the CPU operation can result if this processing is performed at the same time by the one instruction. EPSON S1C63808 TECHNICAL MANUAL...

  • Page 36: Input Ports (K00-K03 And K10-K13)

    4.4 Input Ports (K00–K03 and K10–K13) 4.4.1 Configuration of input ports The S1C63808 has eight bits of general-purpose input ports (K00–K03, K10–K13). Each input port termi- nal provides an internal pull-down resistor that can be enabled by mask option. Figure 4.4.1.1 shows the configuration of input port.

  • Page 37: Mask Option

    K13) with the input port mask option. When "Gate direct" is selected, take care that the floating status does not occur for the input. Select "With pull-down resistor" for input ports that are not being used. EPSON S1C63808 TECHNICAL MANUAL...

  • Page 38: I/O Memory Of Input Ports

    The reading is "1" when the terminal voltage of the eight bits of the input ports (K00–K03, K10–K13) goes high (V ), and "0" when the voltage goes low (V These bits are dedicated for reading, so writing cannot be done. EPSON S1C63808 TECHNICAL MANUAL...
  • Page 39 RETI instruction is executed unless the interrupt factor flag is reset. Therefore, be sure to reset (write "1" to) the interrupt factor flag in the interrupt service routine before shifting to the interrupt enabled state. At initial reset, these flags are set to "0". EPSON S1C63808 TECHNICAL MANUAL...

  • Page 40: Programming Notes

    "1") is set or the RETI instruction is executed unless the interrupt factor flag is reset. Therefore, be sure to reset (write "1" to) the interrupt factor flag in the interrupt service routine before shifting to the interrupt enabled state. EPSON S1C63808 TECHNICAL MANUAL...

  • Page 41: Output Ports (R00-R03 And R10-R13)

    (R00–R03 and R10–R13) 4.5.1 Configuration of output ports The S1C63808 has eight bits of general output ports. Output specifications of the output ports can be selected individually with the mask option. Two kinds of output specifications are available: complementary output and P-channel open drain output.

  • Page 42: High Impedance Control

    Note: A hazard may occur when the BZ signal is turned on and off. Figure 4.5.4.1 shows the output waveform of the BZ signal. R01HIZ register Fix at "0" R01 register Fix at "1" BZE register "0" "1" "0" BZ output Fig. 4.5.4.1 Output waveform of BZ signal EPSON S1C63808 TECHNICAL MANUAL...
  • Page 43 Note: A hazard may occur when the FOUT signal is turned on and off. Figure 4.5.4.3 shows the output waveform of the FOUT signal. R03HIZ register Fix at "0" R03 register Fix at "1" FOUTE register "0" "1" "0" FOUT output Fig. 4.5.4.3 Output waveform of FOUT signal EPSON S1C63808 TECHNICAL MANUAL...

  • Page 44: I/O Memory Of Output Ports

    When the output ports R01, R02 and R03 are used for special output (BZ, TOUT, FOUT), fix the R01HIZ register, R02HIZ register and the R03HIZ register at "0" (data output). At initial reset, these registers are set to "0". EPSON S1C63808 TECHNICAL MANUAL...
  • Page 45 "0", the TOUT signal is output from the R02 terminal. When "0" is written, the R02 termi- nal goes high (V When using the R02 output port for DC output, fix this register at "0". At initial reset, this register is set to "0". EPSON S1C63808 TECHNICAL MANUAL...

  • Page 46: Programming Notes

    (2) A hazard may occur when the BZ, FOUT or TOUT signal is turned on and off. (3) When f is selected for the FOUT signal frequency, it is necessary to control the OSC3 oscillation OSC3 circuit before output. Refer to Section 4.3, "Oscillation Circuit", for the control and notes. EPSON S1C63808 TECHNICAL MANUAL...

  • Page 47: I/O Ports (P00-P03, P10-P13, P20-P23, P30-P33 And P40-P43)

    CHAPTER 4: PERIPHERAL CIRCUITS AND OPERATION (I/O Ports) 4.6 I/O Ports (P00–P03, P10–P13, P20–P23, P30–P33 and P40–P43) 4.6.1 Configuration of I/O ports The S1C63808 has 20 bits of general-purpose I/O ports. Figure 4.6.1.1 shows the configuration of the I/O port. Pull-down control...

  • Page 48: Mask Option

    I/O control. (See Table 4.6.1.1.) 4.6.4 Pull-down during input mode A pull-down resistor that operates during the input mode is built into each I/O port of the S1C63808. Mask option can set the use or non-use of this pull-down.

  • Page 49: I/O Memory Of I/O Ports

    SIF2 is selected PUL20 P20 pull-down control register (ESIF2=0) SIN2 pull-down control register when SIF2 is selected *1 Initial value at initial reset *2 Not set in the circuit *3 Constantly "0" when being read EPSON S1C63808 TECHNICAL MANUAL...
  • Page 50 "1" to the ESIFx register . When P10–P13 are used as I/O ports, write "0". The terminal configuration within P10–P13/P20–P23 that are used for the serial interface is decided by the transfer mode (7-bit asynchronous, 8-bit asynchronous, clock synchronous slave, clock synchronous master) selected with the SMDxx register. EPSON S1C63808 TECHNICAL MANUAL...
  • Page 51 Make this waiting time the amount of time or more calculated by the following expression. 10 × C × R C: terminal capacitance 5 pF + parasitic capacitance ? pF R: pull-down resistance 375 k Ω (Max.) EPSON S1C63808 TECHNICAL MANUAL...

  • Page 52: Programming Note

    Make this waiting time the amount of time or more calculated by the following expression. 10 × C × R C: terminal capacitance 5 pF + parasitic capacitance ? pF R: pull-down resistance 375 kΩ (Max.) EPSON S1C63808 TECHNICAL MANUAL...

  • Page 53: Clock Timer

    4.7 Clock Timer 4.7.1 Configuration of clock timer The S1C63808 has a built-in clock timer that uses OSC1 (crystal oscillator) as the source oscillator. The clock timer is configured of an 8-bit binary counter that serves as the input clock, f...

  • Page 54: Interrupt Function

    (EIT0, EIT1, EIT2, EIT3). However, regardless of the interrupt mask register setting, the interrupt factor flag is set to "1" at the falling edge of the corresponding signal. EPSON S1C63808 TECHNICAL MANUAL...

  • Page 55: I/O Memory Of Clock Timer

    "0" is written. In the STOP status, the timer data is maintained until the next RUN status or the timer is reset. Also, when the STOP status changes to the RUN status, the data that is maintained can be used for resuming the count. At initial reset, this register is set to "0". EPSON S1C63808 TECHNICAL MANUAL...

  • Page 56: Programming Notes

    "1") is set or the RETI instruction is executed unless the interrupt factor flag is reset. Therefore, be sure to reset (write "1" to) the interrupt factor flag in the interrupt service routine before shifting to the interrupt enabled state. EPSON S1C63808 TECHNICAL MANUAL...

  • Page 57: Stopwatch Timer

    4.8.1 Configuration of stopwatch timer The S1C63808 has a 1/1,000 sec stopwatch timer. The stopwatch timer is configured of a 3-stage, 4-bit BCD counter serving as the input clock of a 1,000 Hz signal output from the prescaler. Data can be read out four bits (1/1,000 sec, 1/100 sec and 1/10 sec) at a time by the software.

  • Page 58: Capture Buffer And Hold Function

    Figure 4.8.3.1 shows the timing for data holding and reading. Direct LAP input (K01/K00) Direct LAP internal signal Capture renewal flag CRNWF SWD0–3 reading SWD4–7 reading SWD8–11 reading Data holding Fig. 4.8.3.1 Timing for data holding and reading EPSON S1C63808 TECHNICAL MANUAL...

  • Page 59: Stopwatch Timer Run/Stop And Reset

    SWRUN control. The chattering judgment is performed at the point where the key turns off, and a chattering less than 46.8–62.5 msec is removed. Therefore, more time is needed for an interval be- tween RUN and STOP key inputs. EPSON S1C63808 TECHNICAL MANUAL...
  • Page 60 Capture renewal flag CRNWF SWD0–3 reading SWD4–7 reading SWD8–11 reading Data holding 1 Hz interrupt factor flag ISW1 Lap data carry-up request flag LCURF Counter data Fig. 4.8.5.3 Timing for data holding and reading during direct LAP input EPSON S1C63808 TECHNICAL MANUAL...
  • Page 61 5. Both the RUN and LAP keys and the mask key are pressed at the same time if no other key is held down. (RUN and LAP functions are effective.) Simultaneous key input is referred to as two or more key inputs are sampled at the same falling edge of 1,024 Hz clock. EPSON S1C63808 TECHNICAL MANUAL...

  • Page 62: Interrupt Function

    The respective interrupts can be masked separately through the interrupt mask registers (EISW10, EISW1). However, regardless of the setting of the interrupt mask registers, the interrupt factor flags are set to "1" by the overflow of their corresponding counters. EPSON S1C63808 TECHNICAL MANUAL...
  • Page 63 995 996 997 998 999 000 001 002 003 004 005 006 Capture buffer SWD0–3 reading SWD4–7 reading SWD8–11 reading CRNWF 1 Hz interrupt factor flag ISW1 LCURF Direct RUN interrupt Direct LAP interrupt 10 Hz interrupt 1 Hz interrupt Fig. 4.8.6.2 Timing chart for stopwatch timer EPSON S1C63808 TECHNICAL MANUAL...

  • Page 64: I/O Memory Of Stopwatch Timer

    Data (BCD) of the 1/10 sec column of the capture buffer can be read out. These 4 bits are read-only, and cannot be used for writing operations. At initial reset, the timer data is set to "0". Note: Be sure to data reading in the order of SWD0–3 → SWD4–7 → SWD8–11. EPSON S1C63808 TECHNICAL MANUAL...
  • Page 65 Also, in the STOP status the reset data is maintained. Since this reset does not affect the capture buffer, the capture buffer data in hold status is not cleared and is maintained. This bit is write-only, and is always "0" at reading. EPSON S1C63808 TECHNICAL MANUAL...
  • Page 66 The interrupt mask registers EIRUN, EILAP, EISW1 and EISW10 are used to separately select whether to mask the direct RUN, direct LAP, 1 Hz and 10 Hz interrupts. At initial reset, these registers are set to "0". EPSON S1C63808 TECHNICAL MANUAL...

  • Page 67: Programming Notes

    "1") is set or the RETI instruction is executed unless the interrupt factor flag is reset. Therefore, be sure to reset (write "1" to) the interrupt factor flag in the interrupt service routine before shifting to the interrupt enabled state. EPSON S1C63808 TECHNICAL MANUAL...

  • Page 68: Programmable Timer

    4.9.1 Configuration of programmable timer The S1C63808 has two 8-bit programmable timer systems (timer 0 and timer 1) built-in. The timers are composed of 8-bit presettable down counters and they can be used as 8 bits × 2 channels or 16 bits ×...

  • Page 69: Basic Count Operation

    In addition to reloading the counter, this underflow signal controls the interrupt generation, pulse (TOUT signal) output and clock supplying to the serial interface. PTRUNx PTRSTx RLDx0–x7 Input clock PTDx7 PTDx6 PTDx5 PTDx4 PTDx3 PTDx2 PTDx1 PTDx0 Preset Reload & Interrupt generation Fig. 4.9.2.1 Basic operation timing of down counter EPSON S1C63808 TECHNICAL MANUAL...

  • Page 70: Setting The Input Clock

    "1" is written, the rising edge is selected. The count down timing is shown in Figure 4.9.4.1. EVCNT PTRUN0 PLPOL K13 input Count data Fig. 4.9.4.1 Timing chart in event counter mode EPSON S1C63808 TECHNICAL MANUAL...

  • Page 71: 16-Bit Timer (Timer 0 + Timer 1)

    Timer 1 operates with the timer 0 underflow signal as the count clock, so the clock and RUN/STOP control registers for timer 1 become invalid. The counter data in 16-bit mode must be read in the order below. PTD00–PTD03 → PTD04–PDT07 → PTD10–PTD13 → PTD14–PTD17 EPSON S1C63808 TECHNICAL MANUAL...

  • Page 72: Interrupt Function

    Figure 4.9.7.2 shows the output waveform of the TOUT signal. R02HIZ register Fix at "0" R02 register Fix at "1" PTOUT register "0" "1" "0" TOUT output Fig. 4.9.7.2 Output waveform of the TOUT signal EPSON S1C63808 TECHNICAL MANUAL...

  • Page 73: Transfer Rate Setting For Serial Interface

    Oscillation frequency (OSC1/OSC3) bps: Transfer rate (00H can be set to RLD1x) Be aware that the maximum clock frequency for the serial interface is limited to 2 MHz when OSC3 is used as the clock source. EPSON S1C63808 TECHNICAL MANUAL...

  • Page 74: I/O Memory Of Programmable Timer

    Unused FFF2H IPT1 Interrupt factor flag (Programmable timer 1) IPT0 Reset Invalid Interrupt factor flag (Programmable timer 0) *1 Initial value at initial reset *3 Constantly "0" when being read *2 Not set in the circuit EPSON S1C63808 TECHNICAL MANUAL...
  • Page 75 The counter mode for timer 0 is selected from either the event counter mode or timer mode. When "1" is written to the EVCNT register, the event counter mode is selected and when "0" is written, the timer mode is selected. At initial reset, this register is set to "0". EPSON S1C63808 TECHNICAL MANUAL...
  • Page 76 PTDx4–PTDx7. Since the high-order 4 bits are held by reading the low-order 4 bits, be sure to read the low-order 4 bits first. Since these latches are exclusively for reading, the writing operation is invalid. At initial reset, these counter data are set to "00H". EPSON S1C63808 TECHNICAL MANUAL...
  • Page 77 R02 and when "0" is written, the terminal goes to a high ) level. However, the data register R02 must always be "1" and the high impedance control register R02HIZ must always be "0" (data output state). At initial reset, this register is set to "0". EPSON S1C63808 TECHNICAL MANUAL...
  • Page 78 RETI instruction is executed unless the interrupt factor flag is reset. Therefore, be sure to reset (write "1" to) the interrupt factor flag in the interrupt service routine before shifting to the interrupt enabled state. At initial reset, these flags are set to "0". EPSON S1C63808 TECHNICAL MANUAL...

  • Page 79: Programming Notes

    . Be especially careful when using the OSC1 (low- speed clock) as the clock source of the programmable timer and the CPU is operating with the OSC3 (high-speed clock). EPSON S1C63808 TECHNICAL MANUAL...

  • Page 80: Serial Interface

    4.10 Serial Interface 4.10.1 Configuration of serial interface The S1C63808 incorporates two channels of full duplex serial interface ports (when asynchronous system is selected) that allows the user to select either clock synchronous system or asynchronous system. The data transfer method can be selected in software.

  • Page 81: Mask Option

    Input Output P12/P22 P13/P23 Asynchronous 7-bit Input Output P12/P22 P13/P23 Clock synchronous slave Input Output Input Output Clock synchronous master Input Output Output P13/P23 At initial reset, transfer mode is set to clock synchronous master mode. EPSON S1C63808 TECHNICAL MANUAL...
  • Page 82 SRDYx(P13/P23) READY input (a) Clock synchronous master mode (b) Clock synchronous slave mode S1C63808 External serial device SINx(P10/P20) Data input SOUTx(P11/P21) Data output (c) Asynchronous 7-bit/8-bit mode Fig. 4.10.3.1 Connection examples of serial interface I/O terminals EPSON S1C63808 TECHNICAL MANUAL...

  • Page 83: Clock Source

    (The oscillation start time will vary somewhat depending on the oscillator and on the externally attached parts. Refer to the oscillation start time example indicated in Chapter 7, "Electrical Characteristics".) At initial reset, the OSC3 oscillation circuit is set to OFF status. EPSON S1C63808 TECHNICAL MANUAL...

  • Page 84: Transmit-Receive Control

    If "1" is not written into RXTRGx, the overrun error flag OERx will be set to "1" when the next receiving operation is completed. (An overrun error will be generated when receiving is com- pleted between reading the received data and the writing of "1" to RXTRGx.) EPSON S1C63808 TECHNICAL MANUAL...

  • Page 85: Operation Of Clock Synchronous Transfer

    Because serial interface input/output ports SINx, SOUTx, SCLKx and SRDYx are set as I/O port terminals P10–P13 and P20–P23 at initial reset, "1" must be written to the serial interface enable register ESIFx in order to set these terminals for serial interface use. EPSON S1C63808 TECHNICAL MANUAL...
  • Page 86 Note that the frequency of the serial interface clock is limited to a maximum of 2 MHz. (6) Serial data input/output permutation The S1C63808 provides the data input/output permutation select register SDPx to select whether the serial data bits are transferred from the LSB or MSB. The SDPx register should be set before writing data to TRXDx0–TRXDx7.
  • Page 87 Set the following transmitting data using this interrupt. (6) Repeat steps (3) to (5) for the number of bytes of transmitting data, and then set the transmit disable status by writing "0" to the transmit enable register TXENx, when the transmitting is completed. EPSON S1C63808 TECHNICAL MANUAL...
  • Page 88 (5) Read the received data from TRXDx0–TRXDx7 using receiving complete interrupt. (6) Repeat steps (3) to (5) for the number of bytes of receiving data, and then set the receive disable status by writing "0" to the receive enable register RXENx, when the receiving is completed. EPSON S1C63808 TECHNICAL MANUAL...
  • Page 89 D0 D1 D2 D3 D4 D5 D6 D7 SRDYx TRXDx 1st data SRDYx SRDYx SRDYx Interrupt Interrupt (b) Transmit timing for slave mode (d) Receive timing for slave mode Fig. 4.10.6.4 Timing chart (clock synchronous system transmission) EPSON S1C63808 TECHNICAL MANUAL...

  • Page 90: Operation Of Asynchronous Transfer

    To set the serial interface into a status in which both transmitting and receiving are disabled, "0" must be written to both the transmit enable register TXENx and the receive enable register RXENx. Fix these two registers to a disable status until data transfer actually begins. EPSON S1C63808 TECHNICAL MANUAL...
  • Page 91 Non parity (8) Serial data input/output permutation The S1C63808 provides the data input/output permutation select register SDPx to select whether the serial data bits are transferred from the LSB or MSB. The SDPx register should be set before writing data to TRXDx0–TRXDx7.
  • Page 92 Set the following transmitting data using this interrupt. (5) Repeat steps (3) to (4) for the number of bytes of transmitting data, and then set the transmit disable status by writing "0" to the transmit enable register TXENx, when the transmitting is completed. EPSON S1C63808 TECHNICAL MANUAL...
  • Page 93 (6) Repeat steps (3) to (5) for the number of bytes of receiving data, and then set the receive disable status by writing "0" to the receive enable register RXENx, when the receiving is completed. EPSON S1C63808 TECHNICAL MANUAL...
  • Page 94 Furthermore, when the timing for writing "1" to RXTRGx and the timing for the received data transfer to the receive data buffer overlap, it will be recognized as an overrun error. EPSON S1C63808 TECHNICAL MANUAL...

  • Page 95: Interrupt Function

    The interrupt factor flag and the interrupt mask register for the respective interrupt factors are provided and then the interrupt can be disabled/enabled by the software. Figure 4.10.8.1 shows the configuration of the serial interface interrupt circuit. EPSON S1C63808 TECHNICAL MANUAL...
  • Page 96 The interrupt factor flag ISERx is reset to "0" by writing "1". Since all three types of errors result in the same interrupt factor, you should identify the error that has been generated by the error flags PERx (parity error), OERx (overrun error) and FERx (framing error). EPSON S1C63808 TECHNICAL MANUAL...

  • Page 97: I/O Memory Of Serial Interface

    SIF2 is selected PUL20 P20 pull-down control register (ESIF2=0) SIN2 pull-down control register when SIF2 is selected *1 Initial value at initial reset *2 Not set in the circuit *3 Constantly "0" when being read EPSON S1C63808 TECHNICAL MANUAL...
  • Page 98 Interrupt factor flag (Serial I/F 1 transmit completion) ISRC1 Reset Invalid Interrupt factor flag (Serial I/F 1 receive completion) *1 Initial value at initial reset *2 Not set in the circuit *3 Constantly "0" when being read EPSON S1C63808 TECHNICAL MANUAL...
  • Page 99 Programmable timer OSC3 OSC3 / 16 OSC3 SCSx0 and SCSx1 can also be read out. In the clock synchronous slave mode, setting of these registers are invalid. At initial reset, these registers are set to "0". EPSON S1C63808 TECHNICAL MANUAL...
  • Page 100 "1" has been written to EPRx. When "0" has been written to EPRx, the parity setting by PMDx becomes invalid. At initial reset, this register is set to "0". EPSON S1C63808 TECHNICAL MANUAL...
  • Page 101 Write "1" into RXTRGx to start receiving at the point where the receive data has been read and the following receive preparation has been done. (In the slave mode, SRDYx is asserted at the point where "1" has been written into the RXTRGx.) EPSON S1C63808 TECHNICAL MANUAL...
  • Page 102 An overrun error is generated when a receiving of data has completed prior to writing "1" to RXTRGx in the asynchronous mode. OERx is reset to "0" by writing "1". OERx is set to "0" at initial reset or when RXENx is set to "0". EPSON S1C63808 TECHNICAL MANUAL...
  • Page 103 Transmit completion interrupt factor is generated at the point where the data transmission of the shift register has been completed. Receive completion interrupt factor is generated at the point where the received data has been transferred into the receive data buffer. EPSON S1C63808 TECHNICAL MANUAL...

  • Page 104: Programming Notes

    "1") is set or the RETI instruction is executed unless the interrupt factor flag is reset. Therefore, be sure to reset (write "1" to) the interrupt factor flag in the interrupt service routine before shifting to the interrupt enabled state. EPSON S1C63808 TECHNICAL MANUAL...

  • Page 105: Sound Generator

    4.11 Sound Generator 4.11.1 Configuration of sound generator The S1C63808 has a built-in sound generator for generating a buzzer signal. Hence, the generated buzzer signal can be output from the R01 (BZ) terminal. Aside permitting the respective setting of the buzzer signal frequency and sound level to 8 stages, it permits the adding of a digital envelope by means of duty ratio control.

  • Page 106: Setting Of Buzzer Frequency And Sound Level

    Level 8 (Min.) Fig. 4.11.3.1 Duty ratio of the buzzer signal waveform Note: When a digital envelope has been added to the buzzer signal, the BDTY0–BDTY2 settings will be invalid due to the control of the duty ratio. EPSON S1C63808 TECHNICAL MANUAL...

  • Page 107: Digital Envelope

    BZFQ0–2 ENON ENRST ENRTM BZ signal Level 1 (Max.) duty ratio 8 (Min.) = 62.5 msec = 125 msec –4 –4 = 62.5 msec = 125 msec 02–07 12–17 Fig. 4.11.4.1 Timing chart for digital envelope EPSON S1C63808 TECHNICAL MANUAL...

  • Page 108: One-Shot Output

    One-shot output is invalid during normal buzzer output (during BZE = "1"). Figure 4.11.5.1 shows timing chart for one-shot output. 256 Hz SHTPW BZSHT (W) BZSHT (R) BZSTP BZ output Fig. 4.11.5.1 Timing chart for one-shot output EPSON S1C63808 TECHNICAL MANUAL...

  • Page 109: I/O Memory Of Sound Generator

    Buzzer frequency (Hz) 4096.0 3276.8 2730.7 2340.6 2048.0 1638.4 1365.3 1170.3 Select the buzzer frequency from among the above 8 types that have divided the oscillation clock. At initial reset, these registers are set to "0". EPSON S1C63808 TECHNICAL MANUAL...
  • Page 110 When "1" has been written in ENRTM, it becomes 125 msec (8 Hz) units and when "0" has been written, it becomes 62.5 msec (16 Hz) units. At initial reset, this register is set to "0". EPSON S1C63808 TECHNICAL MANUAL...

  • Page 111: Programming Notes

    BZE register. (3) The one-shot output is only valid when the normal buzzer output is off (BZE = "0") and will be invalid when the normal buzzer output is on (BZE = "1"). EPSON S1C63808 TECHNICAL MANUAL...

  • Page 112: Integer Multiplier

    4.12 Integer Multiplier 4.12.1 Configuration of integer multiplier The S1C63808 has a built-in unsigned-integer multiplier. This multiplier performs 8 bits × 8 bits of multiplication or 16 bits ÷ 8 bits of division and returns the results and three flag states.

  • Page 113: Division Mode

    = 0AH. However, since the operation flags (NF/VF/ZF) are changed in each step, they cannot indicate the states according to the final operation results. Note: Make sure that the division results are correct using software as the hardware does not check. EPSON S1C63808 TECHNICAL MANUAL...

  • Page 114: Execution Cycle

    ; Jump to error routine if VF = "1" %y, -4 ; Set DRL again %ba, [%y]+ [%x]+, %ba ; Store result (quotient) into RAM %ba, [%y]+ [%x]+, %ba ; Store result (remainder) into RAM EPSON S1C63808 TECHNICAL MANUAL...

  • Page 115: I/O Memory Of Integer Multiplier

    After the operation has finished, the low-order 8 bits of the product or the quotient are loaded to this register. However, if an overflow occurs in a division process, the quotient is not loaded and the low-order 8 bits of the dividend remains. At initial reset, this register is undefined. EPSON S1C63808 TECHNICAL MANUAL...

  • Page 116: Programming Note

    CALMD until the operation result is set to the destination register DRH/DRL and the operation flags. While this operation is in process, do not read/write from/to the destination register DRH/DRL and do not read NF/VF/ZF. EPSON S1C63808 TECHNICAL MANUAL...

  • Page 117: Svd (Supply Voltage Detection) Circuit

    4.13.1 Configuration of SVD circuit The S1C63808 has a built-in SVD (supply voltage detection) circuit, so that the software can find when the source voltage lowers. Turning the SVD circuit on/off and the SVD criteria voltage setting can be done with software.

  • Page 118: I/O Memory Of Svd Circuit

    When "1" is read: Supply voltage (V –V ) < Criteria voltage Writing: Invalid The result of supply voltage detection at time of SVDON is set to "0" can be read from this latch. At initial reset, SVDDT is set to "0". EPSON S1C63808 TECHNICAL MANUAL...

  • Page 119: Programming Notes

    1. Set SVDON to "1" 2. Maintain for 1 msec minimum 3. Set SVDON to "0" 4. Read SVDDT (2) The SVD circuit should normally be turned off because SVD operation increase current consumption. EPSON S1C63808 TECHNICAL MANUAL...

  • Page 120: Power Supply For Epd Driver Ic

    4.14 Power Supply for EPD Driver IC (V –V 4.14.1 Configuration of EPD system voltage circuit The S1C63808 has a built-in power supply circuit that generates the voltages (V –V ) for EPD driver ICs. Figure 4.14.1.1 shows the configuration of the EPD system voltage circuit.

  • Page 121: Adjustment Of Epd Driver Voltages

    IC must be higher than the V voltage that will be generated by setting the LC3–LC0 register to the maximum value (7 for 1/3 bias or 15 for 1/2 bias). EPSON S1C63808 TECHNICAL MANUAL...

  • Page 122: I/O Memory Of Power Supply For Epd Driver Ic

    = 2 × V When 1/2 bias is selected: V = 2 × V = 3 × V When 1/3 bias is selected: V , LC3 is ineffective. At initial reset, this register is set to 0000B. EPSON S1C63808 TECHNICAL MANUAL...

  • Page 123: Programming Note

    = 1.03 V when 1/3 bias is selected or 1.08 V when 1/2 bias is selected), it is necessary to initialize by the software. Furthermore, the EPD system voltage circuit is turned off and the V –V terminals go to V level. EPSON S1C63808 TECHNICAL MANUAL...

  • Page 124: Interrupt And Halt

    NMI are masked and interrupts cannot be accepted until the other one is set. <HALT> The S1C63808 has HALT functions that considerably reduce the current consumption when it is not necessary. The CPU enters HALT status when the HALT instruction is executed.
  • Page 125 Interrupt factor flag Interrupt mask register EIK1 KCP12 Input comparison register SIK12 Interrupt selection register KCP13 SIK13 EIT3 EIT2 EIT1 EIT0 IRUN EIRUN ILAP EILAP ISW1 EISW1 ISW10 Fig. 4.15.1 Configuration of the interrupt circuit EISW10 EPSON S1C63808 TECHNICAL MANUAL...

  • Page 126: Interrupt Factor

    "1") is set or the RETI instruction is executed unless the interrupt factor flag is reset. Therefore, be sure to reset (write "1" to) the interrupt factor flag in the interrupt service routine before shifting to the interrupt enabled state. EPSON S1C63808 TECHNICAL MANUAL...

  • Page 127: Interrupt Mask

    High 0102H – 0104H Programmable timer 0106H Serial interface 0108H K00–K03, K10–K13 input 010AH Clock timer 010CH Stopwatch timer 010EH – The four low-order bits of the program counter are indirectly addressed through the interrupt request. EPSON S1C63808 TECHNICAL MANUAL...

  • Page 128: I/O Memory Of Interrupt

    Unused FFF2H IPT1 Interrupt factor flag (Programmable timer 1) IPT0 Reset Invalid Interrupt factor flag (Programmable timer 0) *1 Initial value at initial reset *2 Not set in the circuit *3 Constantly "0" when being read EPSON S1C63808 TECHNICAL MANUAL...

  • Page 129: Programming Notes

    SP1 and SP2 must be set as a pair. When one of them is set, all the interrupts including NMI are masked and interrupts cannot be accepted until the other one is set. EPSON S1C63808 TECHNICAL MANUAL...

  • Page 130: Summary Of Notes

    UMMARY OF OTES 5.1 Notes for Low Current Consumption The S1C63808 contains control registers for each of the circuits so that current consumption can be reduced. These control registers reduce the current consumption through programs that operate the circuits at the minimum levels.

  • Page 131: Summary Of Notes By Function

    0000H to 00FFH. Therefore, pay attention to the SP1 value because it may be set to 0200H or more exceeding the 4-bit/16-bit accessible range in the S1C63808 or it may be set to 00FFH or less. Memory accesses except for stack operations by SP1 are 4-bit data access. After initial reset, all the interrupts including NMI are masked until both the stack pointers SP1 and SP2 are set by software.
  • Page 132 Fig. 5.2.1 Timing chart for RUN/STOP control It is the same even in the event counter mode. Therefore, be aware that the counter does not enter RUN/STOP status if a clock is not input after setting the RUN/STOP control register (PTRUN0). EPSON S1C63808 TECHNICAL MANUAL...
  • Page 133 Table 5.2.1 Time difference between ISERx and ISRCx on error generation Clock source Time difference 1/2 cycles of f OSC3 OSC3 Programmable timer 1 cycle of timer 1 underflow EPSON S1C63808 TECHNICAL MANUAL...
  • Page 134 SP1 and SP2 must be set as a pair. When one of them is set, all the interrupts including NMI are masked and interrupts cannot be accepted until the other one is set. EPSON S1C63808 TECHNICAL MANUAL...

  • Page 135: Precautions On Mounting

    Bypass capacitor connection example (3) Components which are connected to the V and V terminals, such as capacitors, should be connected in the shortest line. EPSON S1C63808 TECHNICAL MANUAL...
  • Page 136 (1) Design the product and implement the IC on the board so that it is shielded from visible radiation in actual use. (2) The inspection process of the product needs an environment that shields the IC from visible radiation. (3) As well as the face of the IC, shield the back and side too. EPSON S1C63808 TECHNICAL MANUAL...

  • Page 137: Basic External Wiring Diagram

    Resistor for OSC3 CR oscillation 30 kΩ (2 MHz) selected. 0.2 µF –C Capacitor 3.3 µF Capacitor 0.1 µF RESET terminal capacitor Note: The above table is simply an example, and is not guaranteed to work. EPSON S1C63808 TECHNICAL MANUAL...

  • Page 138: Chapter Electrical Characteristics

    No pull down RESET, TEST µA Low level input current (2) Kxx, Pxx -0.5 With pull down RESET, TEST High level output current (1) =0.9·V Pxx, Rxx -0.5 Low level output current (1) =0.1·V Pxx, Rxx EPSON S1C63808 TECHNICAL MANUAL...

  • Page 139: Analog Circuit Characteristics And Power Current Consumption

    SVDS0–2="5" 1.30 SVDS0–2="6" 1.40 SVDS0–2="7" 1.50 3.0 V system SVD voltage SVDS0–2="0" 1.70 SVD2 SVDS0–2="1" 1.80 SVDS0–2="2" 1.90 SVDS0–2="3" Typ. 2.00 Typ. SVDS0–2="4" -100mV 2.10 +100mV SVDS0–2="5" 2.40 SVDS0–2="6" 2.70 SVDS0–2="7" 2.90 SVD circuit response time EPSON S1C63808 TECHNICAL MANUAL...
  • Page 140 When CR (built-in R type) is selected for the OSC3 oscillation circuit by mask option ∗3 When CR (external R type) is selected for the OSC3 oscillation circuit by mask option ∗4 When 1/3 bias is selected by mask option EPSON S1C63808 TECHNICAL MANUAL...

  • Page 141: Oscillation Characteristics

    Unless otherwise specified: =3.0V, V =0V, R =30kΩ (2MHz), Ta=-20 to 70°C Item Symbol Condition Min. Typ. Max. Unit Oscillation frequency dispersion OSC3 Oscillation start voltage Vsta Oscillation start time =2.1 to 3.6V Oscillation stop voltage Vstp EPSON S1C63808 TECHNICAL MANUAL...
  • Page 142 The oscillation characteristics change depending on the conditions (components used, board pattern, etc.). Use the following characteristics as reference values and evaluate the characteristics on the actual product. 10000 = 2.1–3.6 V Ta = 25°C Typ. value 1000 Resistor value for CR oscillation R [kΩ] EPSON S1C63808 TECHNICAL MANUAL...

  • Page 143: Serial Interface Ac Characteristics

    Transmitting data output delay time Receiving data input set-up time Receiving data input hold time Note that the maximum clock frequency is limited to 2 MHz. <Master mode> SCLKx OUT SOUTx SINx <Slave mode> SCLKx IN SOUTx SINx EPSON S1C63808 TECHNICAL MANUAL...

  • Page 144: Timing Chart

    CHAPTER 7: ELECTRICAL CHARACTERISTICS 7.7 Timing Chart System clock switching OSCC 5 msec min. ∗ CLKCHG ∗ 1 instruction execution time or longer EPSON S1C63808 TECHNICAL MANUAL...

  • Page 145: Package

    CHAPTER 8: PACKAGE CHAPTER ACKAGE 8.1 Plastic Package QFP13-64pin (Unit: mm) ±0.4 ±0.1 INDEX +0.1 0.18 –0.05 +0.05 0.125 –0.025 0° 10° ±0.2 The dimensions are subject to change without notice. EPSON S1C63808 TECHNICAL MANUAL...

  • Page 146: Ceramic Package For Test Samples

    Pin name Pin name Pin name Pin name P10/SIN1 N.C. P11/SOUT1 N.C. P12/SCLK1 TEST P13/SRDY1 RESET P20/SIN2 N.C. R01/BZ P21/SOUT2 R02/TOUT P22/SCLK2 R03/FOUT P23/SRDY2 OSC1 OSC2 OSC3 OSC4 N.C. N.C. N.C. N.C. N.C. : No Connection EPSON S1C63808 TECHNICAL MANUAL...

  • Page 147: Chapter Pad Layout

    CHAPTER 9: PAD LAYOUT CHAPTER AYOUT 9.1 Diagram of Pad Layout (0, 0) Die No. CB808D 4.20 mm Chip thickness: 400 µm Pad opening: 90 µm EPSON S1C63808 TECHNICAL MANUAL...

  • Page 148: Pad Coordinates

    -1.968 -0.376 1.160 -1.968 1.968 0.354 -0.804 1.968 -1.968 -0.486 1.270 -1.968 1.968 0.464 -0.914 1.968 -1.968 -1.380 1.381 -1.968 1.968 0.594 – – – – – – – – – – – – 1.968 0.704 EPSON S1C63808 TECHNICAL MANUAL...

  • Page 149: Appendix Eripheral Ircuit Oards For S1C63808

    This description of the S1C63 Family Peripheral Circuit Board (S5U1C63000P1) provided in this docu- ment assumes that circuit data for the S1C63808 has already been downloaded to the board. For informa- tion on downloading various circuit data, please see Section A.3. Please refer to the user’s manual provided with your ICE for detailed information on its functions and method of use.
  • Page 150 APPENDIX PERIPHERAL CIRCUIT BOARDS FOR S1C63808 (4) Register monitor pins These pins correspond one-to-one to the registers listed below. The pin outputs a high for logic "1" and a low for logic "0". Monitor Pin No. Name LED No. Name...
  • Page 151 APPENDIX PERIPHERAL CIRCUIT BOARDS FOR S1C63808 (7) RESET switch This switch initializes the internal circuits of this board and feeds a reset signal to the ICE. (8) External part connecting socket Unused (9) CLK and PRG switch If power to the ICE is shut down before circuit data downloading is complete, the circuit configura- tion in this board will remain incomplete, and the debugger may not be able to start when you power on the ICE once again.

  • Page 152: Connecting To The Target System

    APPENDIX PERIPHERAL CIRCUIT BOARDS FOR S1C63808 A.2 Connecting to the Target System This section explains how to connect the S5U1C63000P1 to the target system. S5U1C63000P1 Fig. A.2.1 Installing the peripheral circuit boards to the ICE • Installing the S5U1C63000P1 board Set the jig included with the ICE into position as shown in Figure A.2.2.
  • Page 153 APPENDIX PERIPHERAL CIRCUIT BOARDS FOR S1C63808 Table A.2.1 I/O connector pin assignment 40-pin CN1-1 connector 40-pin CN1-2 connector Pin name Pin name (= 3.3 V) (= 3.3 V) (= 3.3 V) (= 3.3 V) Cannot be connected Cannot be connected...

  • Page 154: Downloading To S5U1C63000P1

    APPENDIX PERIPHERAL CIRCUIT BOARDS FOR S1C63808 A.3 Downloading to S5U1C63000P1 A.3.1 Downloading Circuit Data 1 – when new ICE (S5U1C63000H2) is used The S5U1C63000P1 board comes with the FPGA that contains factory inspection data, therefore the circuit data for the model to be used should be downloaded. The following explains the downloading proce- dure.

  • Page 155: Usage Precautions

    APPENDIX PERIPHERAL CIRCUIT BOARDS FOR S1C63808 A.4 Usage Precautions To ensure correct use of the peripheral circuit board, please observe the following precautions. A.4.1 Operational precautions (1) Before inserting or removing cables, turn off power to all pieces of connected equipment.
  • Page 156 The voltage values can be adjusted manually using the VC5 control. <Access to undefined address space> If any undefined space in the S1C63808's internal ROM/RAM or I/O is accessed for data read or write operations, the read/written value is indeterminate. Additionally, it is important to remain aware that indeterminate state differs between S5U1C63000P1 and the actual IC.

  • Page 157: Product Specifications

    APPENDIX PERIPHERAL CIRCUIT BOARDS FOR S1C63808 A.5 Product Specifications S5U1C63000P1 254 mm (wide) × 144.8 mm (depth) × 13 mm (height) Dimension: (including screws) Weight: Approx. 300 g Power supply: DC 5 V ± 5%, less than 1 A (supplied from ICE main unit)
  • Page 158 80992 Munich, GERMANY Hi- Tech Park, Shenzhen Phone: +49-89-14005-0 Fax: +49-89-14005-110 Phone: +86-755-2699-3828 Fax: +86-755-2699-3838 EPSON TAIWAN TECHNOLOGY & TRADING LTD. 14F, No. 7, Song Ren Road Taipei 110 Phone: +886-2-8786-6688 Fax: +886-2-8786-6660 EPSON SINGAPORE PTE., LTD. 1 HarbourFront Place...
  • Page 159 S1C63808 Technical Manual SEMICONDUCTOR OPERATIONS DIVISION EPSON Electronic Devices Website http://www.epson.jp/device/semicon_e Document code: 411004001 Issue July, 2007 Printed in Japan...

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