I/O Pins Of The Lcd Controller - Epson CMOS 32-Bit Single Chip Microcomputer S1C33L03 Technical Manual

VII LCD CONTROLLER BLOCK: LCD CONTROLLER

I/O Pins of the LCD Controller

Table 2.1 lists the input/output pins of the LCD controller. Table 2.2 shows the pin configurations classified by
type of LCD panel.
Pin name I/O
FPDAT[7:4] O 4-bit LCD-panel data bus
8-bit LCD-panel data bus, four high-order bits
FPDAT[3:0] O 8-bit LCD-panel data bus, four low-order bits
GPO[6:3] General-purpose output when a 4-bit LCD panel is used
FPFRAME O Frame-pulse output
FPLINE O Line-pulse output
FPSHIFT O Shift-clock output
DRDY O LCD backplane bias (MOD)
Shift clock 2 (FPSHIFT2)
See Table 2.2.
LCDPWR O LCD power-supply control output (active high)
GPIO0 I/O GPIO0
P34 I/O port
#BUSREQ Bus-release-request input
#CE6 Area-6 chip enable
GPIO1 I/O GPIO1
P35 I/O port
#BUSACK Acknowledge output for bus release request
GPIO2 I/O GPIO2
P31 I/O port
#BUSGET Bus-status-monitor signal output for bus release request
#GARD GA-area read signal output
Monochrome passive panel
Pin name
FPFRAME
FPLINE
DRDY
FPDAT7
FPDAT6
FPDAT5
FPDAT4
FPDAT3 GPO6
FPDAT2 GPO5
FPDAT1 GPO4
FPDAT0 GPO3
S1C33
FPDAT[7:0]
FPSHIFT
FPFRAME
FPLINE
DRDY
LCDPWR
8-bit passive LCD panel
B-VII-2-4
Table 2.1 I/O Pins of the LCD Controller
See "Control of GPIO pins".
See "Control of GPIO pins".
See "Control of GPIO pins".
Table 2.2 Pin Configurations by Type of LCD Panel
4 bits 8 bits
MOD MOD
D3 D7
D2 D6
D1 D5
D0 D4
D3
D2
D1
D0
LCD panel
D[7:0]
FPSHIFT
FPFRAME
FPLINE
MOD
Figure 2.2 Typical LCD-Panel Connections
Description
Color passive panel
4 bits
FPFRAME
FPLINE
MOD
D3
D2
D1
D0
GPO6
GPO5
GPO4
GPO3
S1C33
FPDAT[3:0]
FPSHIFT
FPFRAME
FPLINE
DRDY
LCDPWR
4-bit passive LCD panel
EPSON
8-bit format 1 8-bit format 2
FPSHIFT2 MOD
D7 D7
D6 D6
D5 D5
D4 D4
D3 D3
D2 D2
D1 D1
D0 D0
LCD panel
D[3:0]
FPSHIFT
FPFRAME
FPLINE
MOD
S1C33L03 FUNCTION PART