Power Save - Epson CMOS 32-Bit Single Chip Microcomputer S1C33L03 Technical Manual

Power Save

The LCD controller has two types of power-save modes. Use LPSAVE[1:0] (D[1:0])/LCDC mode register 2
(0x39FFE3) to set power-save modes.
Power-save mode
When the LCD controller enters this mode, all LCD signal output pins, including the LCDPWR pin, are
dropped low, with the LCD panel placed in power-down mode. All operations of the LCD controller, other
than accessing of its control registers, are disabled. The look-up tables cannot be accessed.
The LCD controller is placed in power-save mode by setting LPSAVE to "00", thereby executing a power-
down sequence. The LCDPWR signal goes low a one-frame period later, and LCD signals are deasserted.
Note: Because the bus clock is turned off in HALT2 or SLEEP mode, the one-frame period described
above must elapse before the chip can be placed in standby mode. The number of frames can be
counted by reading the VNDPF (D7)/vertical non-display period register (0x39FFEA) repeatedly.
VNDPF is set to "1" during the vertical non-display period (set to "0" during the display period).
The LCD controller is taken out of power-save mode by setting LPSAVE to "11", thereby executing a power-
up sequence. The LCD signal output is enabled and the LCDPWR signal goes high a one-frame period after
power-save mode is released.
The above power-up/power-down sequences can be controlled with a user's desired timing by using
LPWREN (D4)/LCDC mode register 2 (0x39FFE3). For details on the control procedure, refer to
"Controlling LCD Power Up/Down".
Doze mode
Doze mode is a power-save mode designed for use with Epson's MLS LCD drivers. When MLS LCD drivers
are used, there is no need to send data constantly in order to refresh the display of the same image. The LCD
controller can be set in doze mode during this period. In doze mode, the FPDAT and FPSHIFT signals are
fixed low so that no access to the display memory occurs. Although the power-saving effects are not as
significant as in power-save mode, this mode helps reduce the current consumption in the LCD panel while
keeping the display on.
Comparison of power-save modes
The differences between power-save modes are summarized in Table 2.18.
Item
Accessing IO registers
Accessing look-up table
Sequence controller in LCDC
Display
LCDPWR signal
FPDAT[7:0], FPSHIFT signals
FPLINE, FPFRAME, DRDY signals
S1C33L03 FUNCTION PART
Table 2.17 Settings of Power-Save Modes
LPSAVE1 LPSAVE0
0 0
0 1
1 0
1 1
Table 2.18 Differences between Power-Save Modes
Doze mode
Enabled
Enabled
Run
Display
Active
Forced low
Active
EPSON
VII LCD CONTROLLER BLOCK: LCD CONTROLLER
Mode
Power-save mode
Reserved
Doze mode
Normal operation
Power-save mode
Enabled
Disabled
Stop
Blank
Inactive
Forced low
Forced low
A-1
Normal
Enabled
Enabled
Run
Display
Active
Active
Active
B-VII
LCDC
B-VII-2-29