Table of Contents
Advertisement
Memory Configuration
Use the registers described below to select the area in which SDRAMs are connected and the chip enable
output pin to be used for SDRAMs.
Selecting areas
Area 7 or 13: SDRAR0 (D7)/SDRAM area configuration register (0x39FFC0)
Area 8 or 14: SDRAR1 (D6)/SDRAM area configuration register (0x39FFC0)
Writing "1" to SDRARx sets the corresponding area for SDRAM use. When SDRARx = "0" (default), the
area is used for devices other than SDRAM that are controlled only by the BCU.
Selecting chip enable
#SDCE0(#CE7/13): SDRPC0 (D3)/SDRAM area configuration register (0x39FFC0)
#SDCE1(#CE8/14): SDRPC1 (D2)/SDRAM area configuration register (0x39FFC0)
Writing "1" to SDRPCx sets the corresponding pin for SDRAM chip enable output. When SDRPCx = "0"
(default), the pin is used for devices other than SDRAM that are controlled only by the BCU.
Although #SDCE0 and #SDCE1 are assigned to the #CE7 and #CE8 pins, respectively, they are not
necessarily fixed to either area. For example, even when using area 7 or 13 for SDRAMs, the chip enable
used for the SDRAM can be #SDCE1 (#CE8/14).
Table 2.5 lists the chip enable address ranges and the SDRAM sizes that can be connected when the area(s)
and chip enable are selected according to the above.
CEFUNC
SDRAR0
0
XX
X
1
1
1
0
00
0
(default)
0
1
1
1
1
1
1
01
0
10
0
11
0
1
1
1
Area 7 = 0x400000–0x5FFFFF, Area 8 = 0x600000–0x7FFFFF, Area 7&8 = 0x400000–0x7FFFFF
Area 13 = 0x2000000–0x2FFFFFF, Area 14 = 0x3000000–0x3FFFFFF, Area 13&14 = 0x2000000–0x3FFFFFF
S1C33L03 FUNCTION PART
Table 2.5 Chip Enable Configuration
SDRAR1
SDRPC0
SDRPC1
0
X
X
X
0
0
0
1
0
0
0
1
0
1
1
1
1
0
1
0
1
1
1
1
1
1
0
1
0
1
1
1
1
0
1
0
0
0
1
0
1
1
1
1
0
1
0
1
1
1
1
1
1
0
1
0
1
1
1
1
EPSON
VI SDRAM CONTROLLER BLOCK: SDRAM INTERFACE
#SDCE0
#SDCE1
address range
address range
N/A
N/A
Area 7
N/A
Area 7
Area 7
Area 8
N/A
Area 8
N/A
Area 8
Area 7&8
N/A
Area 7&8
Area 7
Area 8
Area 13
N/A
Area 13
Area 13
Area 14
N/A
Area 14
N/A
Area 14
Area 13&14
N/A
Area 13&14
Area 13
Area 14
SDRAM size
(16-bit)
N/A
0
N/A
0
N/A
2MB
2MB
N/A
2MB
N/A
2MB
2MB
2MB
N/A
4MB
4MB
2MB x 2
N/A
16MB
16MB
N/A
16MB
N/A
16MB
16MB
16MB
N/A
32MB
32MB
16MB x 2
B-VI-2-7
A-1
B-VI
SDRAM
Advertisement
Table of Contents
