Register name
Address
Bit
SDRAM area
039FFC0
D7
configuration
(B)
D6
register
D5–4
D3
D2
D1–0
SDRAM
039FFC1
D7
control register
(B)
D6
D5
D4
D3
D2–0
SDRAM
039FFC2
D7
address
(B)
D6–5
configuration
register
D4
D3–2
D1
D0
SDRAM
039FFC3
D7
mode set-up
(B)
D6–5
register
D4
D3–2
D1–0
SDRAM
039FFC4
D7–5
timing set-up
(B)
register 1
D4–3
D2–0
S1C33L03 PRODUCT PART
Name
Function
SDRAR0
Area 7/13 configuration
SDRAR1
Area 8/14 configuration
–
reserved
SDRPC0
#CE7/13 pin configuration
SDRPC1
#CE8/14 pin configuration
–
reserved
SDRENA
Enable SDRAM signals
SDRINI
Start SDRAM power up
SDRSRF
Enable SDRAM self-refresh
SDRIS
Initial command sequence
SDRCLK
Keep SDCLK during self-refresh
–
reserved
–
reserved
SDRCA1
SDRAM page size
SDRCA0
(column range)
–
reserved
SDRRA1
SDRAM row addressing range
SDRRA0
SDRBA
Number of SDRAM banks
–
reserved
–
reserved
SDRCL1
SDRAM CAS latency
SDRCL0
–
reserved
SDRBL1
SDRAM burst length
SDRBL0
–
reserved
SDRTRAS2
SDRAM t
spec
RAS
SDRTRAS1
SDRTRAS0
SDRTRP1
SDRAM t
spec
RP
SDRTRP0
SDRTRC2
SDRAM t
spec
RC
SDRTRC1
SDRTRC0
EPSON
4 PERIPHERAL CIRCUITS
Setting
Init. R/W
1 SDRAM
0 Not SDRAM
0
1 SDRAM
0 Not SDRAM
0
–
–
1 #SDCE0
0 #CE7/13
0
1 #SDCE1
0 #CE8/14
0
–
–
1 Enabled
0 Disabled
0
1 Start
0 –
0
1 Enabled
0 Disabled
0
1 1 precharge
0 1 precharge
0
2 set reg.
2 refresh
3 refresh
3 set reg.
1 Kept
0 Stopped
1
–
–
–
–
SDRCA[1:0]
Page size
0
1
1
reserved
0
1
0
1K (SDA[9:0])
0
1
512 (SDA[8:0])
0
0
256 (SDA[7:0])
–
–
SDRRA[1:0] Addressing range
0
1
1
reserved
0
1
0
8K (SDA[12:0])
0
1
4K (SDA[11:0])
0
0
2K (SDA[10:0])
1 4 banks
0 2 banks
0
–
–
–
–
SDRCL[1:0]
CAS latency
1
1
0
2 CAS latency
1
–
–
SDRBL[1:0]
Burst length
1
1
1
8
1
1
0
4
0
1
2
0
0
1
–
–
SDRTRAS[2:0] Number of clocks
0
1
1
1
7
0
1
1
0
6
0
1
0
1
5
1
0
0
4
0
1
1
3
0
1
0
2
0
0
1
1
0
0
0
8
SDRTRP[1:0] Number of clocks
0
1
1
3
0
1
0
2
0
1
1
0
0
4
SDRTRC[2:0] Number of clocks
0
1
1
1
7
0
1
1
0
6
0
1
0
1
5
1
0
0
4
0
1
1
3
0
1
0
2
0
0
1
1
0
0
0
8
A-1
Remarks
R/W
R/W
–
0 when being read.
A-4
R/W
R/W
–
0 when being read.
R/W
R/W
0 when being read.
R/W
R/W
R/W
–
0 when being read.
–
0 when being read.
R/W
–
0 when being read.
R/W
R/W
–
0 when being read.
–
0 when being read.
R/W
–
0 when being read.
R/W
–
0 when being read.
R/W
R/W
R/W
A-59