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Boot Address
When the core CPU is initially reset, it reads the reset vector (program start address) from the boot address
(0x0C00000) and loads the vector to the PC (program counter). Then the CPU starts executing the program from
the address when the #RESET pin goes high.
The trap table in which trap vectors for interrupts and other trap factors are written also begins from the boot
address by the default setting. (Refer to the "S1C33000 Core CPU Manual" for details of the trap table.)
The trap table base address can also be changed to a 1KB boundary address using the TTBR register (0x48134 to
0x48137).
Notes Related to Initial Reset
Core CPU
Since the all registers except for the PC and PSR are indeterminate at initial reset, they should be initialized
by a program. In particular, the SP (stack pointer) must be initialized before accessing the stack area. NMI
requests are disabled until any value is written to the SP. The initialization is necessary when the CPU is
cold-started.
Internal RAM
The contents of the internal RAM are indeterminate at initial reset. Initialize the area to be used if necessary.
High-speed (OSC3) oscillation circuit
An initial reset activates the high-speed (OSC3) oscillation circuit and the CPU starts operating with the
OSC3 clock after the initial reset is released. In order to prevent a malfunction of the CPU due to an
unstabilized clock, the #RESET pin must be maintained at low until the OSC3 oscillation stabilizes when
performing a power-on reset or resetting while the high-speed (OSC3) oscillation circuit is stopped.
Low-speed (OSC1) oscillation circuit
A power-on reset or an initial reset when the low-speed (OSC1) oscillation circuit is off starts the OSC1
oscillation. The low-speed (OSC1) oscillation circuit takes a longer stabilization time (3 sec max. under the
standard condition) than the high-speed (OSC3) oscillation circuit. In order to prevent a malfunction due to
an unstabilized clock, do not use the OSC1 clock until the stabilization time has passed.
BCU (Bus Control Unit)
Cold-start initializes the control registers for the BCU (bus control unit). Therefore, it is necessary to set up
all the bus conditions.
Hot-start retains the previous bus conditions before an initial reset.
Input/output ports and input/output pins
Cold start initializes the control and data registers for the input and I/O ports.
Hot start retains the contents of the control registers and input/output pin status before an initial reset.
However, when the pins are used for the internal peripheral circuits, it is necessary to set up the control
registers of the peripheral circuit because they are initialized by an initial reset.
Other internal peripheral circuits
The control and data registers of peripheral circuits other than those listed above are initialized with the
predefined values or become indeterminate regardless of the reset method (cold start or hot start). Therefore,
it is necessary to set up the peripheral circuit conditions.
Refer to the I/O maps or explanation of each peripheral circuit section for initial settings of the peripheral
circuits.
S1C33L03 FUNCTION PART
EPSON
II CORE BLOCK: INITIAL RESET
B-II-3-3
A-1
B-II
Reset
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