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Register name
Address
Bit
16-bit timer 4/5
0040268
D7
interrupt
(B)
D6
priority register
D5
D4
D3
D2
D1
D0
8-bit timer,
0040269
D7
serial I/F Ch.0
(B)
D6
interrupt
D5
priority register
D4
D3
D2
D1
D0
Serial I/F Ch.1,
004026A
D7
A/D interrupt
(B)
D6
priority register
D5
D4
D3
D2
D1
D0
Clock timer
004026B
D7–3
interrupt
(B)
D2
priority register
D1
D0
Port input 4/5
004026C
D7
interrupt
(B)
D6
priority register
D5
D4
D3
D2
D1
D0
Port input 6/7
004026D
D7
interrupt
(B)
D6
priority register
D5
D4
D3
D2
D1
D0
Key input,
0040270
D7–6
port input 0–3
(B)
D5
interrupt
D4
enable register
D3
D2
D1
D0
DMA interrupt
0040271
D7–5
enable register
(B)
D4
D3
D2
D1
D0
16-bit timer 0/1
0040272
D7
interrupt
(B)
D6
enable register
D5–4
D3
D2
D1–0
16-bit timer 2/3
0040273
D7
interrupt
(B)
D6
enable register
D5–4
D3
D2
D1–0
S1C33L03 FUNCTION PART
Name
Function
–
reserved
P16T52
16-bit timer 5 interrupt level
P16T51
P16T50
–
reserved
P16T42
16-bit timer 4 interrupt level
P16T41
P16T40
–
reserved
PSI002
Serial interface Ch.0
PSI001
interrupt level
PSI000
–
reserved
P8TM2
8-bit timer 0–3 interrupt level
P8TM1
P8TM0
–
reserved
PAD2
A/D converter interrupt level
PAD1
PAD0
–
reserved
PSI012
Serial interface Ch.1
PSI011
interrupt level
PSI010
–
reserved
PCTM2
Clock timer interrupt level
PCTM1
PCTM0
–
reserved
PP5L2
Port input 5 interrupt level
PP5L1
PP5L0
–
reserved
PP4L2
Port input 4 interrupt level
PP4L1
PP4L0
–
reserved
PP7L2
Port input 7 interrupt level
PP7L1
PP7L0
–
reserved
PP6L2
Port input 6 interrupt level
PP6L1
PP6L0
–
reserved
EK1
Key input 1
EK0
Key input 0
EP3
Port input 3
EP2
Port input 2
EP1
Port input 1
EP0
Port input 0
–
reserved
EIDMA
IDMA
EHDM3
High-speed DMA Ch.3
EHDM2
High-speed DMA Ch.2
EHDM1
High-speed DMA Ch.1
EHDM0
High-speed DMA Ch.0
E16TC1
16-bit timer 1 comparison A
E16TU1
16-bit timer 1 comparison B
–
reserved
E16TC0
16-bit timer 0 comparison A
E16TU0
16-bit timer 0 comparison B
–
reserved
E16TC3
16-bit timer 3 comparison A
E16TU3
16-bit timer 3 comparison B
–
reserved
E16TC2
16-bit timer 2 comparison A
E16TU2
16-bit timer 2 comparison B
–
reserved
EPSON
II CORE BLOCK: ITC (Interrupt Controller)
Setting
Init. R/W
–
–
0 to 7
X
X
X
–
–
0 to 7
X
X
X
–
–
0 to 7
X
X
X
–
–
0 to 7
X
X
X
–
–
0 to 7
X
X
X
–
–
0 to 7
X
X
X
–
–
0 to 7
X
X
X
–
–
0 to 7
X
X
X
–
–
0 to 7
X
X
X
–
–
0 to 7
X
X
X
–
–
0 to 7
X
X
X
–
–
1 Enabled
0 Disabled
0
0
0
0
0
0
–
–
1 Enabled
0 Disabled
0
0
0
0
0
1 Enabled
0 Disabled
0
0
–
–
1 Enabled
0 Disabled
0
0
–
–
1 Enabled
0 Disabled
0
0
–
–
1 Enabled
0 Disabled
0
0
–
–
A-1
Remarks
–
0 when being read.
R/W
–
0 when being read.
R/W
–
0 when being read.
R/W
–
0 when being read.
R/W
–
0 when being read.
R/W
–
0 when being read.
R/W
B-II
–
Writing 1 not allowed.
R/W
–
0 when being read.
R/W
ITC
–
0 when being read.
R/W
–
0 when being read.
R/W
–
0 when being read.
R/W
–
0 when being read.
R/W
R/W
R/W
R/W
R/W
R/W
–
0 when being read.
R/W
R/W
R/W
R/W
R/W
R/W
R/W
–
0 when being read.
R/W
R/W
–
0 when being read.
R/W
R/W
–
0 when being read.
R/W
R/W
–
0 when being read.
B-II-5-13
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