Epson CMOS 32-Bit Single Chip Microcomputer S1C33L03 Technical Manual page 211

Cmos 32-bit single chip microcomputer
Table of Contents

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Register name
Address
Bit
Areas 12–11
0048124
DF–7
set-up register
(HW)
D6
D5
D4
D3
D2
D1
D0
Areas 10–9
0048126
DF
set-up register
(HW)
DE
DD
DC
DB
DA
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
Areas 8–7
0048128
DF–9
set-up register
(HW)
D8
D7
D6
D5
D4
D3
D2
D1
D0
S1C33L03 FUNCTION PART
Name
Function
reserved
A12SZ
Areas 12–11 device size selection
A12DF1
Areas 12–11
A12DF0
output disable delay time
reserved
A12WT2
Areas 12–11 wait control
A12WT1
A12WT0
reserved
A10IR2
Area 10 internal ROM size
A10IR1
selection
A10IR0
reserved
A10BW1
Areas 10–9
A10BW0
burst ROM
burst read cycle wait control
A10DRA
Area 10 burst ROM selection
A9DRA
Area 9 burst ROM selection
A10SZ
Areas 10–9 device size selection
A10DF1
Areas 10–9
A10DF0
output disable delay time
reserved
A10WT2
Areas 10–9 wait control
A10WT1
A10WT0
reserved
A8DRA
Area 8 DRAM selection
A7DRA
Area 7 DRAM selection
A8SZ
Areas 8–7 device size selection
A8DF1
Areas 8–7
A8DF0
output disable delay time
reserved
A8WT2
Areas 8–7 wait control
A8WT1
A8WT0
EPSON
II CORE BLOCK: BCU (Bus Control Unit)
Setting
Init. R/W
1 8 bits
0 16 bits
0
A18DF[1:0] Number of cycles
1
1
1
3.5
1
1
0
2.5
0
1
1.5
0
0
0.5
A18WT[2:0]
Wait cycles
1
1
1
1
7
1
1
1
0
6
1
1
0
1
5
1
0
0
4
0
1
1
3
0
1
0
2
0
0
1
1
0
0
0
0
A10IR[2:0]
ROM size
1
1
1
1
2MB
1
1
1
0
1MB
1
1
0
1
512KB
1
0
0
256KB
0
1
1
128KB
0
1
0
64KB
0
0
1
32KB
0
0
0
16KB
A10BW[1:0]
Wait cycles
0
1
1
3
0
1
0
2
0
1
1
0
0
0
1 Used
0 Not used
0
1 Used
0 Not used
0
1 8 bits
0 16 bits
0
A10DF[1:0] Number of cycles
1
1
1
3.5
1
1
0
2.5
0
1
1.5
0
0
0.5
A10WT[2:0]
Wait cycles
1
1
1
1
7
1
1
1
0
6
1
1
0
1
5
1
0
0
4
0
1
1
3
0
1
0
2
0
0
1
1
0
0
0
0
1 Used
0 Not used
0
1 Used
0 Not used
0
1 8 bits
0 16 bits
0
A8DF[1:0] Number of cycles
1
1
1
3.5
1
1
0
2.5
0
1
1.5
0
0
0.5
A8WT[2:0]
Wait cycles
1
1
1
1
7
1
1
1
0
6
1
1
0
1
5
1
0
0
4
0
1
1
3
0
1
0
2
0
0
1
1
0
0
0
0
A-1
Remarks
0 when being read.
R/W
R/W
0 when being read.
R/W
0 when being read.
R/W
B-II
0 when being read.
R/W
BCU
R/W
R/W
R/W
R/W
0 when being read.
R/W
0 when being read.
R/W
R/W
R/W
R/W
0 when being read.
R/W
B-II-4-35

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