Epson CMOS 32-Bit Single Chip Microcomputer S1C33L03 Technical Manual page 499

Cmos 32-bit single chip microcomputer
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S1C33
SDA[9:0](A[10:1])
SDBA[1:0](A[15:14])
#SDCE0(#CE7)
#SDCE1(#CE8)
#SDCAS(#HCAS)
#SDRAS(#LCAS)
SDA[12:11](A[13:12])
SDA[12:11](A[13:12])
S1C33L03 FUNCTION PART
SDA11(A12)
SDA10(P33)
D[15:0]
BCLK
SDCKE(P20)
#SDWE(P21)
HDQM(P32)
LDQM(P15)
Figure 2.3 Connecting two 16-bit SDRAMs (32MB)
S1C33
SDA10(P33)
SDA[9:0](A[10:1])
SDBA[1:0](A[15:14])
D[7:0]
BCLK
SDCKE(P20)
#SDCE0/1(#CE7/8)
#SDCAS(#HCAS)
#SDRAS(#LCAS)
#SDWE(P21)
LDQM(P15)
For little endian
S1C33
SDA10(P33)
SDA[9:0](A[10:1])
SDBA[1:0](A[15:14])
D[15:8]
BCLK
SDCKE(P20)
#SDCE0/1(#CE7/8)
#SDCAS(#HCAS)
#SDRAS(#LCAS)
#SDWE(P21)
HDQM(P32)
For big endian
Figure 2.4 Connecting an 8-bit SDRAM (16MB)
EPSON
VI SDRAM CONTROLLER BLOCK: SDRAM INTERFACE
128M SDRAM
(2M x 16 bits x 4 banks)
A11
A10
A[9:0]
BA[1:0]
DQ[15:0]
CLK
CKE
#CS
#CAS
#RAS
#WE
DQMU
DQML
128M SDRAM
(2M x 16 bits x 4 banks)
A11
A10
A[9:0]
BA[1:0]
DQ[15:0]
CLK
CKE
#CS
#CAS
#RAS
#WE
DQMU
DQML
128M SDRAM
(4M x 8 bits x 4 banks)
A[12:11]
A10
A[9:0]
BA[1:0]
DQ[7:0]
CLK
CKE
#CS
#CAS
#RAS
#WE
DQM
128M SDRAM
(4M x 8 bits x 4 banks)
A[12:11]
A10
A[9:0]
BA[1:0]
DQ[7:0]
CLK
CKE
#CS
#CAS
#RAS
#WE
DQM
A-1
B-VI
SDRAM
B-VI-2-3

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