Epson CMOS 32-Bit Single Chip Microcomputer S1C33L03 Technical Manual page 98

8 ELECTRICAL CHARACTERISTICS
DRAM access cycle common characteristics
1) 3.3 V/5.0 V dual power source
(Unless otherwise specified: V
Item
#RAS signal delay time (1)
#RAS signal delay time (2)
#RAS signal pulse width
#CAS signal delay time (1)
#CAS signal delay time (2)
#CAS signal pulse width
Read signal delay time (3)
Read signal pulse width (2)
Write signal delay time (3)
Write signal pulse width (2)
2) 3.3 V single power source
Item
#RAS signal delay time (1)
#RAS signal delay time (2)
#RAS signal pulse width
#CAS signal delay time (1)
#CAS signal delay time (2)
#CAS signal pulse width
Read signal delay time (3)
Read signal pulse width (2)
Write signal delay time (3)
Write signal pulse width (2)
3) 2.0 V single power source
Item
#RAS signal delay time (1)
#RAS signal delay time (2)
#RAS signal pulse width
#CAS signal delay time (1)
#CAS signal delay time (2)
#CAS signal pulse width
Read signal delay time (3)
Read signal pulse width (2)
Write signal delay time (3)
Write signal pulse width (2)
A-82
=5.0V 0.5V, V
DDE
Symbol
t
RASD1
t
RASD2
t t
RASW
t
CASD1
t
CASD2
t t
CASW
t
RDD3
t t
RDW2
t
WRD3
t t
WRW2
(Unless otherwise specified: V
Symbol
t
RASD1
t
RASD2
t t
RASW
t
CASD1
t
CASD2
t t
CASW CYC
t
RDD3
t t
RDW2
t
WRD3
t t
WRW2
(Unless otherwise specified: V
Symbol
t
RASD1
t
RASD2
t t
RASW
t
CASD1
t
CASD2
t t
CASW CYC
t
RDD3
t t
RDW2
t
WRD3
t t
WRW2
EPSON
=2.7V to 3.6V, V
DD
Min.
(2+WC)-10
CYC
(0.5+WC)-5
CYC
(2+WC)-10
CYC
(2+WC)-10
CYC
=V =2.7V to 3.6V, V
DDE DD
Min.
(2+WC)-10
CYC
(0.5+WC)-10
(2+WC)-10
CYC
(2+WC)-10
CYC
=V =2.0V 0.2V, V
DDE DD
Min.
(2+WC)-20
CYC
(0.5+WC)-20
(2+WC)-20
CYC
(2+WC)-20
CYC
=0V, Ta=-40°C to +85°C)
SS
Max. Unit
10 ns
10 ns
ns
10 ns
10 ns
ns
10 ns
ns
10 ns
ns
=0V, Ta=-40°C to +85°C)
SS
Max. Unit
10 ns
10 ns
ns
10 ns
10 ns
ns
10 ns
ns
10 ns
ns
=0V, Ta=-40°C to +85°C)
SS
Max. Unit
20 ns
20 ns
ns
20 ns
20 ns
ns
20 ns
ns
20 ns
ns
S1C33L03 PRODUCT PART