Table of Contents
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Register name
Address
Bit
Port function
00402DF
D7
extension
(B)
D6
register
D5
D4
D3
D2
D1
D0
Areas 18–15
0048120
DF
set-up register
(HW)
DE
DD
DC
DB
DA
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
Areas 14–13
0048122
DF–9
set-up register
(HW)
D8
D7
D6
D5
D4
D3
D2
D1
D0
S1C33L03 PRODUCT PART
Name
Function
CFEX7
P07 port extended function
CFEX6
P06 port extended function
CFEX5
P05 port extended function
CFEX4
P04 port extended function
CFEX3
P31 port extended function
CFEX2
P21 port extended function
CFEX1
P10, P11, P13 port extended
function
CFEX0
P12, P14 port extended function
–
reserved
A18SZ
Areas 18–17 device size selection
A18DF1
Areas 18–17
A18DF0
output disable delay time
–
reserved
A18WT2
Areas 18–17 wait control
A18WT1
A18WT0
–
reserved
A16SZ
Areas 16–15 device size selection
A16DF1
Areas 16–15
A16DF0
output disable delay time
–
reserved
A16WT2
Areas 16–15 wait control
A16WT1
A16WT0
–
reserved
A14DRA
Area 14 DRAM selection
A13DRA
Area 13 DRAM selection
A14SZ
Areas 14–13 device size selection
A14DF1
Areas 14–13
A14DF0
output disable delay time
–
reserved
A14WT2
Areas 14–13 wait control
A14WT1
A14WT0
EPSON
4 PERIPHERAL CIRCUITS
Setting
Init. R/W
1 #DMAEND3 0 P07, etc.
0
1 #DMAACK3 0 P06, etc.
0
1 #DMAEND2 0 P05, etc.
0
1 #DMAACK2 0 P04, etc.
0
1 #GARD
0 P31, etc.
0
1 #GAAS
0 P21, etc.
0
1 DST0
0 P10, etc.
1
DST1
P11, etc.
DPC0
P13, etc.
1 DST2
0 P12, etc.
1
DCLK
P14, etc.
–
–
1 8 bits
0 16 bits
0
A18DF[1:0] Number of cycles
1
1
1
3.5
1
1
0
2.5
0
1
1.5
0
0
0.5
–
–
A18WT[2:0]
Wait cycles
1
1
1
1
7
1
1
1
0
6
1
1
0
1
5
1
0
0
4
0
1
1
3
0
1
0
2
0
0
1
1
0
0
0
0
–
–
1 8 bits
0 16 bits
0
A16DF[1:0] Number of cycles
1
1
1
3.5
1
1
0
2.5
0
1
1.5
0
0
0.5
–
–
A16WT[2:0]
Wait cycles
1
1
1
1
7
1
1
1
0
6
1
1
0
1
5
1
0
0
4
0
1
1
3
0
1
0
2
0
0
1
1
0
0
0
0
–
–
1 Used
0 Not used
0
1 Used
0 Not used
0
1 8 bits
0 16 bits
0
A14DF[1:0] Number of cycles
1
1
1
3.5
1
1
0
2.5
0
1
1.5
0
0
0.5
–
–
A14WT[2:0]
Wait cycles
1
1
1
1
7
1
1
1
0
6
1
1
0
1
5
1
0
0
4
0
1
1
3
0
1
0
2
0
0
1
1
0
0
0
0
A-1
Remarks
R/W
R/W
R/W
A-4
R/W
R/W
R/W
R/W
R/W
–
0 when being read.
R/W
R/W
–
0 when being read.
R/W
–
0 when being read.
R/W
R/W
–
0 when being read.
R/W
–
0 when being read.
R/W
R/W
R/W
R/W
–
0 when being read.
R/W
A-39
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