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CKSL0: Timer 0 input clock selection (D3) / 16-bit timer 0 control register (0x48186)
CKSL1: Timer 1 input clock selection (D3) / 16-bit timer 1 control register (0x4818E)
CKSL2: Timer 2 input clock selection (D3) / 16-bit timer 2 control register (0x48196)
CKSL3: Timer 3 input clock selection (D3) / 16-bit timer 3 control register (0x4819E)
CKSL4: Timer 4 input clock selection (D3) / 16-bit timer 4 control register (0x481A6)
CKSL5: Timer 5 input clock selection (D3) / 16-bit timer 5 control register (0x481AE)
Selects the input clock of each timer.
Write "1": External clock
Write "0": Internal clock
Read: Valid
The internal clock (prescaler output) is selected for the input clock of each timer by writing "0" to CKSLx. An
external clock (one that is fed from the clock input pin) is selected by writing "1", and the timer functions as an
event counter. In this case, the clock input pin must be set using CFP1x before an external clock is selected here.
At initial reset, CKSLx is set to "0" (internal clock).
PTM0: Timer 0 clock output control (D2) / 16-bit timer 0 control register (0x48186)
PTM1: Timer 1 clock output control (D2) / 16-bit timer 1 control register (0x4818E)
PTM2: Timer 2 clock output control (D2) / 16-bit timer 2 control register (0x48196)
PTM3: Timer 3 clock output control (D2) / 16-bit timer 3 control register (0x4819E)
PTM4: Timer 4 clock output control (D2) / 16-bit timer 4 control register (0x481A6)
PTM5: Timer 5 clock output control (D2) / 16-bit timer 5 control register (0x481AE)
Controls the output of the TMx signal (timer output clock).
Write "1": On
Write "0": Off
Read: Valid
The TMx signal is output from the clock output pin by writing "1" to PTMx. Clock output is stopped by writing "0"
to PTMx and goes to the off level according to the OUTINVx setting (low when OUTINVx = "0" or high when
OUTINVx = "1"). In this case, the clock output pin must be set using CFP2x before outputting the TMx signal
here.
At initial reset, PTMx is set to "0" (off).
PRESET0: Timer 0 reset (D1) / 16-bit timer 0 control register (0x48186)
PRESET1: Timer 1 reset (D1) / 16-bit timer 1 control register (0x4818E)
PRESET2: Timer 2 reset (D1) / 16-bit timer 2 control register (0x48196)
PRESET3: Timer 3 reset (D1) / 16-bit timer 3 control register (0x4819E)
PRESET4: Timer 4 reset (D1) / 16-bit timer 4 control register (0x481A6)
PRESET5: Timer 5 reset (D1) / 16-bit timer 5 control register (0x481AE)
Resets the counter.
Write "1": Reset
Write "0": Invalid
Read: Always "0"
The counter of timer x is reset by writing "1" to PRESETx.
Writing "0" results in No Operation.
Since PRESETx is a write-only bit, its content when read is always "0".
S1C33L03 FUNCTION PART
III PERIPHERAL BLOCK: 16-BIT PROGRAMMABLE TIMERS
EPSON
A-1
B-III
16TM
B-III-4-21
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