Epson CMOS 32-Bit Single Chip Microcomputer S1C33L03 Technical Manual page 138

APPENDIX A <REFERENCE> EXTERNAL DEVICE INTERFACE TIMINGS
ROM: 100ns, CPU: 25MHz, normal read
BCLK
A[23:0]
#CE9, 10
#RD
D[15:0]
ROM: 100ns, CPU: 25MHz, burst read
BCLK
A[23:0]
#CE9, 10
#RD
D[15:0]
ROM: 100ns, CPU: 20MHz, normal read
BCLK
A[23:0]
#CE9, 10
D[15:0]
ROM: 100ns, CPU: 20MHz, burst read
BCLK
A[23:0]
#CE9, 10
#RD
D[15:0]
A-122
Normal read cycle
RD data
#RD
Normal read cycle
RD data
RD data
Burst read cycle
RD data RD data RD data
RD data
Burst read cycle
RD data RD data RD data
EPSON
S1C33L03 PRODUCT PART