Processors; Plug-In Voltage Regulator Module (Vrm) Converters; System Memory - Intel SR4850HW4 - Server Platform - 0 MB RAM Product Manual

Processors

®
The Intel Server Platform SR4850HW4 and SR4850HW4/M supports upto four physical
processors, either 64-bit Intel
processor MP with 8MB L3 Cache, or Dual-Core Intel
processors are targeted for multiprocessor servers. Several architectural and microarchitectural
enhancements have been added to this processor, including an increased L2 cache size, an
integrated L3 cache (64-bit Intel
cores within a physical package.

Plug-in Voltage Regulator Module (VRM) Converters

Two types of plug-in voltage regulator module (VRM) converters are used in the system:
L3Cache VRM9DO
VRM 10.2
Input power to the main board is 12V and 3.3 Volts Standby (VSB). All other voltages must be
generated on the board set including 3.3V and 5V. There are numerous VRDs used to generate the
required voltage levels. Processor core voltage to processors 1 and 2 is generated by embedded
VRDs. Core voltage to processors 3 and 4 comes from two 10.2 VRMs. There is one embedded
L3Cache VRM9DO required for converting the cache voltage for processors 1 and 2. A plug-in
L3Cache VRM9DO is required for processors 3 and 4, if the installed processors have an L3 cache.

System Memory

The memory boards connect to the main board through x16 PCI Express* connectors. Between one
and four memory boards can be installed. Each memory board has four DIMM sockets that support
two DDR2 channels with two DIMMs per channel. The memory boards support both single-rank
and double-rank registered DIMMs. Do not use unbuffered DIMMs.
The DIMMs on each memory board must be installed in pairs. Each pair is referred to as a bank. A
bank may consist of one rank (a pair of single-sided DIMMs) or two ranks (a pair of double-sided
DIMMs). The BIOS executes a memory test prior to configuring the memory in POST and when a
memory board is inserted into the system during a Hot-plug operation.
A DIMM bank will be disabled if any of the following occur:
Uncorrectable errors are found during a memory test
An uncorrectable ECC error occurred during runtime
The DIMM rank correctable error count passes the error sparing threshold on a memory board
where sparing is enabled
A memory board fails
If a DIMM fails the memory test, an LED will light on the memory board to identify the location of
the bad DIMM and the DIMM bank will be disabled. The failing DIMM event is logged to the
System Event Log (SEL) and the BIOS disables the memory DIMM and/or the memory board.
Upon subsequent reboots, this memory is not initialized unless the BIOS setup option "Retest all
system memory" or "Retest board memory" is selected.
Intel® Server Platforms SR4850HW4 & SR4850HW4/M Product Guide
® ®
Xeon processor MP with 1MB L2 Cache, 64-bit Intel
® ®
Xeon processor MP with 8MB L3 Cache), or multiple processor
® ®
Xeon processor 7000 sequence. These
® ®
Xeon
37