Analog Devices ADSP-SC58 Series Hardware Reference Manual page 3754

Table A-68: ADSP-SC58x DMC1 MMR Register Addresses (Continued)
Memory Map- Register Name
ped Address
0x31073008 DMC1_STAT
0x3107300C DMC1_EFFCTL
0x31073010 DMC1_PRIO
0x31073014 DMC1_PRIOMSK
0x31073018 DMC1_PRIO2
0x3107301C DMC1_PRIOMSK2
0x31073040 DMC1_CFG
0x31073044 DMC1_TR0
0x31073048 DMC1_TR1
0x3107304C DMC1_TR2
0x3107305C DMC1_MSK
0x31073060 DMC1_MR
0x31073064 DMC1_MR1
0x31073064 DMC1_EMR1
0x31073068 DMC1_EMR2
0x31073068 DMC1_MR2
0x31073080 DMC1_DLLCTL
0x31073090 DMC1_DT_CALIB_ADDR
0x31073094 DMC1_DT_DATA_CAL-
IB_DATA0
0x31073098 DMC1_DT_DATA_CAL-
IB_DATA1
0x31073100 DMC1_RDDATABUFID1
0x31073104 DMC1_RDDATABUFMSK1 DMC1 DMC Read Data Buffer Mask Register 1
0x31073108 DMC1_RDDATABUFID2
0x3107310C DMC1_RDDATABUFMSK2 DMC1 DMC Read Data Buffer Mask Register 2
0x310731C0 DMC1_CPHY_CTL
ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference
Description
DMC1 Status Register
DMC1 Efficiency Control Register
DMC1 Priority ID Register 1
DMC1 Priority ID Mask Register 1
DMC1 Priority ID Register 2
DMC1 Priority ID Mask Register 2
DMC1 Configuration Register
DMC1 Timing 0 Register
DMC1 Timing 1 Register
DMC1 Timing 2 Register
DMC1 Mask (Mode Register Shadow) Register
DMC1 Shadow MR Register (DDR2/LPDDR), Shadow
MR0 Register (DDR3)
DMC1 Shadow MR1 Register (DDR3)
DMC1 Shadow EMR1 DDR2 Register
DMC1 Shadow EMR2 Register (DDR2)/Shadow EMR
Register (LPDDR)
DMC1 Shadow MR2 Register (DDR3)
DMC1 DLL Control Register
DMC1 Data Calibration Address Register
DMC1 Data Calibration Data 0 Register
DMC1 Data Calibration Data 1 Register
DMC1 DMC Read Data Buffer ID Register 1
DMC1 DMC Read Data Buffer ID Register 2
DMC1 Controller to PHY Interface Register
ADSP-SC58x Register List
Reset Value
0x00000001
0x00440000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x0000054B
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
A–75