Table 56-31: CSPFT_CTL Register Fields (Continued)
Bit No.
(Access)
10
PB
(R/W)
8
BBRAN
(R/W)
ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference
Bit Name
Programming Bit.
To program the CSPFT, use the following procedure.
1. Set the CSPFT_CTL.PB bit to disable all trace functionality.
2. Poll the CSPFT_STAT.PB bit waiting for it to be 1 (FIFO drained, trace halted).
3. Program the trace registers, counter and other registers, as required.
4. Set this bit to 0.
5. Poll the CSPFT_STAT.PB bit until it reads 0 (trace status reset, trace restarted).
When the CSPFT_CTL.PB bit is set, the FIFO is drained and no more trace is pro-
duced. All counters are held in their present state and the external outputs are forced
low. After the FIFO is drained, the CSPFT_STAT.PB is set to reflect that the part is
ready to program.
When this bit is cleared, the trace status is cleared and trace is restarted.
Branch Broadcast.
Set the CSPFT_CTL.BBRAN bit to 1 to enable branch broadcasting. Branch broad-
casting traces the address of direct branch instructions rather than producing E atoms.
ADSP-SC58x CSPFT Register Descriptions
Description/Enumeration
0 Trace Enabled
1 Trace Disabled
56–37
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