Analog Devices ADSP-SC58 Series Hardware Reference Manual page 3642

ADSP-SC58x CSPFT Register Descriptions
Main Control Register
The register controls general operation of the PTM, such as whether tracing is enabled.
CSPFT_CTL
CIDSZ (R/W)
Context ID Size
PB (R/W)
Programming Bit
RSENA (R/W)
Return Stack Enable
Figure 56-20: CSPFT_CTL Register Diagram
Table 56-31: CSPFT_CTL Register Fields
Bit No.
(Access)
29 RSENA
(R/W)
15:14 CIDSZ
(R/W)
56–36
15 14 13 12 11 10
0 0 0 0 0 1
31 30 29 28 27 26
0 0 1 0 0 0
Bit Name
Return Stack Enable.
When the CSPFT_CTL.RSENA bit is set, the first indirect branch back to an address
generates a branch without exception packet, and subsequent branches back to the
same address generate E Atoms.
This compresses inner loops of HW loops and code that indirectly branches back.
Context ID Size.
The CSPFT_CTL.CIDSZ bit field specifies the byte size to trace. Only the bytes
specified are traced, even if the new Context ID value is larger than this.
ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference
9 8 7 6 5 4 3 2
0 0 0 0 0 0 0 0
25 24 23 22 21 20 19 18
0 0 0 0 0 0 0 0
Description/Enumeration
0 No Context ID Tracing
1 One byte Traced
2 Two Bytes Traced
3 Three Bytes Traced
1 0
0 0
BBRAN (R/W)
Branch Broadcast
17 16
0 0