Analog Devices ADSP-SC58 Series Hardware Reference Manual page 3604

Sharc+ processor
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Lower Address Register n
The SWU lower address registers (SWU_LA[n]) contain each watchpoint group's lower address for address match
comparison. In exact match on
group uses only this address for match comparison.
Figure 55-10: SWU_LA[n] Register Diagram
Table 55-13: SWU_LA[n] Register Fields
Bit No.
(Access)
31:0
ADDR
(R/W)
ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference
SWU_LA[n]
address mode (SWU_CTL[n].ACMPM bits =01), the watchpoint
15
0
ADDR[15:0] (R/W)
Lower Address
31
0
ADDR[31:16] (R/W)
Lower Address
Bit Name
Lower Address.
14
13
12
11
10
9
8
7
0
0
0
0
0
0
0
0
30
29
28
27
26
25
24
23
0
0
0
0
0
0
0
0
Description/Enumeration
ADSP-SC58x SWU Register Descriptions
6
5
4
3
2
1
0
0
0
0
0
0
0
0
22
21
20
19
18
17
16
0
0
0
0
0
0
0
55–25

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