Xilinx MicroBlaze Reference Manual page 41

Table 2-21: Translation Look-Aside Buffer High Register (TLBHI) (Continued)
(Continued)
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MicroBlaze Processor Reference Guide
UG081 (v14.7)
Bits Name
E Endian
When this bit is set to 1, a the page is accessed as a little
endian page if C_ENDIANNESS is 0 (Big Endian), or as
a big endian page otherwise.
When cleared to 0, the page is accessed as a big endian
page if C_ENDIANNESS is 0 (Big Endian), or as a little
endian page otherwise.
The E bit only affects data read or data write accesses.
Instruction accesses are not affected.
The E bit is only implemented when the parameter
C_USE_REORDER_INSTR is set to 1, otherwise it is
fixed to 0.
Read/Write
U0 User Defined
This bit is fixed to 0, since there are no user defined
storage attributes on MicroBlaze.
Read Only
Reserved
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Registers
Reset
Value
0
0
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