Xilinx MicroBlaze Reference Manual page 198

Chapter 5: MicroBlaze Instruction Set Architecture
fsqrt
Floating Point Arithmetic Square Root
fsqrt
0 1 0 1 1 0
0 6
Description
Performs a floating point square root on the value in rA and puts the result in register rD.
Pseudocode
Registers Altered
•
•
•
Latency
•
•
Note
This instruction is only available when the MicroBlaze parameter C_USE_FPU is set to 2
(Extended).
198
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rD, rA
rD rA
11
if isDnz(rA) then
←
(rD) 0xFFC00000
←
FSR[DO] 1
←
ESR[EC] 00110
else if isSigNaN(rA) then
←
(rD) 0xFFC00000
←
FSR[IO] 1
←
ESR[EC] 00110
else if isQuietNaN(rA) then
←
(rD) 0xFFC00000
else if (rA) < 0 then
←
(rD) 0xFFC00000
←
FSR[IO] 1
←
ESR[EC] 00110
else if (rA) = -0 then
←
(rD) -0
else
←
(rD) sqrt ((rA))
rD, unless an FP exception is generated, in which case the register is unchanged
ESR[EC], if an FP exception is generated
FSR[IO,DO]
27 cycles with C_AREA_OPTIMIZED=0
29 cycles with C_AREA_OPTIMIZED=1
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Square Root
0 0 1 1 1 0 0 0 0 0 0 0
16 21
MicroBlaze Processor Reference Guide
31
UG081 (v14.7)