Xilinx MicroBlaze Reference Manual page 227

ori
Logical OR with Immediate
ori
1 0 1 0 0 0
0 6
Description
The contents of register rA are ORed with the extended IMM field, sign-extended to 32 bits; the
result is placed into register rD.
Pseudocode
Registers Altered
•
Latency
•
Note
By default, Type B Instructions will take the 16-bit IMM field value and sign extend it to 32 bits to
use as the immediate operand. This behavior can be overridden by preceding the Type B instruction
with an imm instruction. See the instruction
values.
MicroBlaze Processor Reference Guide
UG081 (v14.7)
rD, rA, IMM
rD rA
1
1
← ∨
(rD) (rA) sext(IMM)
rD
1 cycle
www.xilinx.com
IMM
1
6
"imm," page 204 for details on using 32-bit immediate
Instructions
3
1
227
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