Xilinx MicroBlaze Reference Manual page 192

Chapter 5: MicroBlaze Instruction Set Architecture
fmul
Floating Point Arithmetic Multiplication
fmul
0 1 0 1 1 0
0 6
Description
The floating point value in rA is multiplied with the floating point value in rB and the result is placed
into register rD.
Pseudocode
Registers Altered
•
•
•
Latency
•
•
Note
This instruction is only available when the MicroBlaze parameter C_USE_FPU is greater than 0.
192
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rD, rA, rB
rD rA
11
if isDnz(rA) or isDnz(rB) then
←
(rD) 0xFFC00000
←
FSR[DO] 1
←
ESR[EC] 00110
else
if isSigNaN(rA) or isSigNaN(rB) or (isZero(rA) and isInfinite(rB)) or
(isZero(rB) and isInfinite(rA)) then
←
(rD) 0xFFC00000
←
FSR[IO] 1
←
ESR[EC] 00110
else if isQuietNaN(rA) or isQuietNaN(rB) then
←
(rD) 0xFFC00000
else if isDnz((rB)*(rA)) then
←
(rD) signZero((rA)*(rB))
←
FSR[UF] 1
←
ESR[EC] 00110
else if isNaN((rB)*(rA)) then
←
(rD) signInfinite((rB)*(rA))
←
FSR[OF] 1
←
ESR[EC] 00110
else
←
(rD) (rB) * (rA)
rD, unless an FP exception is generated, in which case the register is unchanged
ESR[EC], if an FP exception is generated
FSR[IO,UF,OF,DO]
4 cycles with C_AREA_OPTIMIZED=0
6 cycles with C_AREA_OPTIMIZED=1
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Multiply
rB 0 0 1 0 0 0 0 0 0 0 0
16 21
MicroBlaze Processor Reference Guide
31
UG081 (v14.7)