Xilinx MicroBlaze Reference Manual page 12

Chapter 2: MicroBlaze Architecture
Table 2-1: Configurable Feature Overview by MicroBlaze Version
Feature
Configurable cache data widths
Count Leading Zeros instruction
Memory Barrier instruction
Stack overflow and underflow detection
Allow stream instructions in user mode
Lockstep support
Configurable use of FPGA primitives
Low-latency interrupt mode
Swap instructions
Sleep mode and sleep instruction
Relocatable base vectors
ACE (M_ACE_DC) protocol for D-Cache
ACE (M_ACE_IC) protocol for I-Cache
1. Used in Virtex ® -4 and subsequent families, for saving MUL18 and DSP48 primitives.
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v8.30 v8.40
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MicroBlaze Processor Reference Guide
UG081 (v14.7)
v8.50
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