Xilinx MicroBlaze Reference Manual page 35

Stack Low Register (SLR)
The Stack Low Register stores the stack low limit use to detect stack overflow. When the address of
a load or store instruction using the stack pointer (register R1) as rA is less than the Stack Low
Register, a stack overflow occurs, causing a Stack Protection Violation exception if exceptions are
enabled in MSR.
When read with the MFS instruction, the SLR is specified by setting Sa = 0x0800.
illustrates the SLR register and
Note:
0
Table 2-16: Stack Low Register (SLR)
0:31
Stack High Register (SHR)
The Stack High Register stores the stack high limit use to detect stack underflow. When the address
of a load or store instruction using the stack pointer (register R1) as rA is greater than the Stack High
Register, a stack underflow occurs, causing a Stack Protection Violation exception if exceptions are
enabled in MSR.
When read with the MFS instruction, the SHR is specified by setting Sa = 0x0802.
illustrates the SHR register and
Note:
0
Table 2-17: Stack High Register (SHR)
0:31
MicroBlaze Processor Reference Guide
UG081 (v14.7)
The register is only implemented if C_USE_STACK_PROTECTION is set to 1.
Figure 2-10: SLR
Bits Name
SLR Stack Low Register
The register is only implemented if C_USE_STACK_PROTECTION is set to 1.
Figure 2-11: SHR
Bits Name
SHR Stack High Register
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Table 2-16 provides bit descriptions and reset values.
↑
SLR
Description
Table 2-17 provides bit descriptions and reset values.
↑
SHR
Description
Registers
Figure 2-10
31
Reset Value
0x00000000
Figure 2-11
31
Reset Value
0xFFFFFFFF
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