Xilinx MicroBlaze Reference Manual page 105

Table 3-1: Summary of MicroBlaze Core I/O (Continued)
IPLB_MWrErr
IPLB_MIRQ
IPLB_MWrBTerm
IPLB_MWrDAck
IPLB_MAddrAck
IPLB_MRdBTerm
IPLB_MRdDAck
IPLB_MRdDBus
IPLB_MRdWdAddr
IPLB_MRearbitrate
IPLB_MSSize
IPLB_MTimeout
Data_Addr[0:31]
Byte_Enable[0:3]
Data_Write[0:31]
D_AS
Read_Strobe
Write_Strobe
Data_Read[0:31]
DReady
DWait
DCE
DUE
Instr_Addr[0:31]
I_AS
IFetch
Instr[0:31]
MicroBlaze Processor Reference Guide
UG081 (v14.7)
Signal Interface
IPLB
IPLB
IPLB
IPLB
IPLB
IPLB
IPLB
IPLB
IPLB
IPLB
IPLB
IPLB
DLMB
DLMB
DLMB
DLMB
DLMB
DLMB
DLMB
DLMB
DLMB
DLMB
DLMB
ILMB
ILMB
ILMB
ILMB
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MicroBlaze I/O Overview
I/O Description
I Instruction Interface PLB slave write error
indicator
I Instruction Interface PLB slave interrupt
indicator
I Instruction Interface PLB terminate write
burst indicator
I Instruction Interface PLB write data
acknowledge
I Instruction Interface PLB address
acknowledge
I Instruction Interface PLB terminate read
burst indicator
I Instruction Interface PLB read data
acknowledge
I Instruction Interface PLB read data bus
I Instruction Interface PLB read word address
I Instruction Interface PLB bus rearbitrate
indicator
I Instruction Interface PLB slave data bus size
I Instruction Interface PLB bus timeout
O Data interface LMB address bus
O Data interface LMB byte enables
O Data interface LMB write data bus
O Data interface LMB address strobe
O Data interface LMB read strobe
O Data interface LMB write strobe
I Data interface LMB read data bus
I Data interface LMB data ready
I Data interface LMB data wait
I Data interface LMB correctable error
I Data interface LMB uncorrectable error
O Instruction interface LMB address bus
O Instruction interface LMB address strobe
O Instruction interface LMB instruction fetch
I Instruction interface LMB read data bus
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