Xilinx MicroBlaze Reference Manual page 36

Chapter 2: MicroBlaze Architecture
Process Identifier Register (PID)
The Process Identifier Register is used to uniquely identify a software process during MMU address
translation. It is controlled by the C_USE_MMU configuration option on MicroBlaze. The register is
only implemented if C_USE_MMU is greater than 1 (User Mode) and C_AREA_OPTIMIZED is set
to 0. When accessed with the MFS and MTS instructions, the PID is specified by setting Sa =
0x1000. The register is accessible according to the memory management special registers parameter
C_MMU_TLB_ACCESS.
PID is also used when accessing a TLB entry:
•
•
Figure 2-12
Table 2-18: Process Identifier Register (PID)
0:23
24:31
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When writing Translation Look-Aside Buffer High (TLBHI) the value of PID is stored in the
TID field of the TLB entry
When reading TLBHI and MSR[UM] is not set, the value in the TID field is stored in PID
illustrates the PID register and
↑
RESERVED
Figure 2-12: PID
Bits Name
Reserved
PID Used to uniquely identify a software process during
MMU address translation.
Read/Write
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Table 2-18 provides bit descriptions and reset values.
24
Description
MicroBlaze Processor Reference Guide
31
↑
PID
Reset Value
0x00
UG081 (v14.7)