Xilinx MicroBlaze Reference Manual page 139

Table 3-18: MPD Parameters (Continued)
Parameter Name
C_AVOID_PRIMITIVES
C_PVR
C_PVR_USER1
C_PVR_USER2
C_RESET_MSR
C_INSTANCE
C_D_PLB
C_D_AXI
C_D_LMB
C_I_PLB
C_I_AXI
C_I_LMB
C_USE_BARREL
C_USE_DIV
C_USE_HW_MUL
MicroBlaze Processor Reference Guide
UG081 (v14.7)
Feature/Description
Disallow FPGA primitives
0 = None
1 = SRL
2 = LUTRAM
3 = Both
Processor version register
mode selection
0 = None
1 = Basic
2 = Full
Processor version register
USER1 constant
Processor version register
USER2 constant
Reset value for MSR
register
Instance Name
Data side PLB interface
Data side AXI interface
Data side LMB interface
Instruction side PLB
interface
Instruction side AXI
interface
Instruction side LMB
interface
Include barrel shifter
Include hardware divider
Include hardware
multiplier
0 = None
1 = Mul32
2 = Mul64
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MicroBlaze Core Configurability
EDK
Allowable Default Tool
Values Value Assig
ned
0, 1, 2, 3 0
0, 1, 2 0
0x00-0xff 0x00
0x00000000- 0x0000
0xffffffff 0000
0x00, 0x20,
0x00
0x80, 0xa0
Any instance micro
name blaze
0, 1 0
0, 1 0
0, 1 1
0, 1 0
0, 1 0
0, 1 1
0, 1 0
0, 1 0
0, 1, 2 1
Send Feedback
VHDL Type
integer
integer
std_logic_vector
(0 to 7)
std_logic_vector
(0 to 31)
std_logic_vector
yes string
yes integer
yes integer
yes integer
yes integer
yes integer
yes integer
integer
integer
integer
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