Xilinx MicroBlaze Reference Manual page 30

Chapter 2: MicroBlaze Architecture
Exception Address Register (EAR)
The Exception Address Register stores the full load/store address that caused the exception for the
following:
•
•
•
•
•
•
The contents of this register is undefined for all other exceptions. When read with the MFS
instruction, the EAR is specified by setting Sa = 0x0003. The EAR register is illustrated in
Figure 2-5
0
Table 2-10: Exception Address Register (EAR)
0:31
30
Send Feedback
An unaligned access exception that means the unaligned access address
A DPLB or M_AXI_DP exception that specifies the failing PLB or AXI4 data access address
A data storage exception that specifies the (virtual) effective address accessed
An instruction storage exception that specifies the (virtual) effective address read
A data TLB miss exception that specifies the (virtual) effective address accessed
An instruction TLB miss exception that specifies the (virtual) effective address read
and Table 2-10 provides bit descriptions and reset values.
Figure 2-5: EAR
Bits Name
EAR Exception Address Register
www.xilinx.com
↑
EAR
Description
MicroBlaze Processor Reference Guide
31
Reset Value
0x00000000
UG081 (v14.7)