Xilinx MicroBlaze Reference Manual page 17

Table 2-6: MicroBlaze Instruction Set Summary (Continued)
Type A
Type B
TNAPUTD Ra,Rb
TNECAGETD Rd,Rb
TNCAPUTD Ra,Rb
FADD Rd,Ra,Rb
FRSUB Rd,Ra,Rb
FMUL Rd,Ra,Rb
FDIV Rd,Ra,Rb
FCMP.UN Rd,Ra,Rb
FCMP.LT Rd,Ra,Rb
FCMP.EQ Rd,Ra,Rb
FCMP.LE Rd,Ra,Rb
FCMP.GT Rd,Ra,Rb
FCMP.NE Rd,Ra,Rb
FCMP.GE Rd,Ra,Rb
FLT Rd,Ra
FINT Rd,Ra
FSQRT Rd,Ra
TNEAGET Rd,FSLx
TNAPUT Ra,FSLx
TNECAGET Rd,FSLx
MicroBlaze Processor Reference Guide
UG081 (v14.7)
0-5 6-10 11-15 16-20
0-5 6-10 11-15
010011 00000 Ra
010011 Rd 00000
010011 00000 Ra
010110 Rd Ra
010110 Rd Ra
010110 Rd Ra
010110 Rd Ra
010110 Rd Ra
010110 Rd Ra
010110 Rd Ra
010110 Rd Ra
010110 Rd Ra
010110 Rd Ra
010110 Rd Ra
010110 Rd Ra
010110 Rd Ra
010110 Rd Ra
011011 Rd 00000
011011 00000 Ra
011011 Rd 00000
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21-31
16-31
Rb 0N0TA0 FSL Rb[28:31] := Ra (data write)
00000 MSR[C] := FSL_M_Full if N = 1
Rb 0N1TAE Rd := FSL Rb[28:31] (control read)
00000 MSR[FSL] := 1 if (FSL_S_Control = 0)
MSR[C] := not FSL_S_Exists if N = 1
Rb 0N1TA0 FSL Rb[28:31] := Ra (control write)
00000 MSR[C] := FSL_M_Full if N = 1
Rb 00000000000 Rd := Rb+Ra, float
Rb 00010000000 Rd := Rb-Ra, float
Rb 00100000000 Rd := Rb*Ra, float
Rb 00110000000 Rd := Rb/Ra, float
Rb 01000000000 Rd := 1 if (Rb = NaN or Ra = NaN, float
else
Rd := 0
Rb 01000010000 Rd := 1 if (Rb < Ra, float
Rd := 0
Rb 01000100000 Rd := 1 if (Rb = Ra, float
Rd := 0
Rb 01000110000 Rd := 1 if (Rb <= Ra, float
Rd := 0
Rb 01001000000 Rd := 1 if (Rb > Ra, float
Rd := 0
Rb 01001010000 Rd := 1 if (Rb != Ra, float
Rd := 0
Rb 01001100000 Rd := 1 if (Rb >= Ra, float
Rd := 0
0 01010000000 Rd := float (Ra)
0 01100000000 Rd := int (Ra)
0 01110000000 Rd := sqrt (Ra)
0N0TAE000000 & Rd := FSLx (data read, blocking if N = 0)
FSLx MSR[FSL] := 1 if (FSLx_S_Control = 1)
MSR[C] := not FSLx_S_Exists if N = 1
1N0TA0000000 & FSLx := Ra (data write, blocking if N = 0)
FSLx MSR[C] := FSLx_M_Full if N = 1
0N1TAE000000 & Rd := FSLx (control read, blocking if N = 0)
FSLx MSR[FSL] := 1 if (FSLx_S_Control = 0)
MSR[C] := not FSLx_S_Exists if N = 1
Instructions
Semantics
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