I/O Signals For The Programmable Controller Cpu; I/O Signal List - Mitsubishi Electric QJ81DL96 User Manual

3
SPECIFICATIONS

3.3 I/O Signals for the Programmable Controller CPU

3.3.1 I/O signal list

The following table shows the list of high speed data logger module I/O signals for the
programmable controller CPU.
The I/O signal allocation is shown for when the high speed data logger module is mounted
on the 0 slot of the main base unit.
If the high speed data logger module is mounted on a slot other than slot 0, use by
substituting the I/O signals of the slot on which the module is mounted.
Device X indicates an input signal from the high speed data logger module to the
programmable controller CPU and device Y indicates an output signal from the
programmable controller CPU to the high speed data logger module.
Signal direction High speed data logger module programmable
controller CPU
Device No.
Module READY
X0
ON: Module prepared
CompactFlash card status
X1
ON: Inserted
File access status
X2
ON: Stopped
X3 Use prohibited
Network connection status
X4
ON: Connected
Module operating status
X5
ON: Running
X6
X7
X8 Use prohibited
X9
XA
SNTP time synchronization timing
XB
ON: Synchronizing complete
XC
XD
Use prohibited
XE
XF
ERR. LED status
X10
ON: Illuminated, flashing
3
- 18 3.3 I/O Signals for the Programmable Controller CPU
3.3.1 I/O signal list
Signal name
OFF: -
OFF: Not inserted
OFF: Running
OFF: Not connected
OFF: Stopped
OFF: -
OFF: Off
Signal direction Programmable controller CPU high speed data
logger module
Device No.
Y0
Use prohibited
Y1
File access stop request
Y2
ON: Stop request
Clear file access stop request
Y3
ON: Clear stop request
Y4
Y5
Y6 Use prohibited
Y7
Y8
Y9
YA
Programmable controller CPU time synchronization
YB request
ON: Synchronization request
YC
YD
Use prohibited
YE
YF
Error clear request
Y10
ON: Error clear request
Signal name
OFF: -
OFF: -
OFF: -
OFF: -
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